counter.fit.qmsg

用verilog实现单片机计数器 用verilog实现单片机计数器

{ "Extra Info" "IFSAC_FSAC_START_LUT_IO_RAM_PACKING" "" "Extra Info: Moving registers into I/O cells, LUTs, and RAM blocks to improve timing and density" {  } {  } 1 0 "Moving registers into I/O cells, LUTs, and RAM blocks to improve timing and density" 1 0}
{ "Info" "IFSAC_FSAC_FINISH_LUT_IO_RAM_PACKING" "" "Info: Finished moving registers into I/O cells, LUTs, and RAM blocks" {  } {  } 0 0 "Finished moving registers into I/O cells, LUTs, and RAM blocks" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "00:00:00 " "Info: Finished register packing: elapsed time is 00:00:00" {  } {  } 0 0 "Finished register packing: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:01 " "Info: Fitter placement operations ending: elapsed time is 00:00:01" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "3.616 ns register register " "Info: Estimated most critical path is register to register delay of 3.616 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns data0:b2v_inst13\|TOUT0\[3\] 1 REG LAB_X4_Y19 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X4_Y19; Fanout = 3; REG Node = 'data0:b2v_inst13\|TOUT0\[3\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { data0:b2v_inst13|TOUT0[3] } "NODE_NAME" } } { "counter.vqm" "" { Text "D:/Quartus/MCU-counter/syn/rev_1/counter.vqm" 466 19 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.406 ns) + CELL(0.509 ns) 0.915 ns data0:b2v_inst13\|TOUT0_cout\[3\]~COUT1_45 2 COMB LAB_X4_Y19 2 " "Info: 2: + IC(0.406 ns) + CELL(0.509 ns) = 0.915 ns; Loc. = LAB_X4_Y19; Fanout = 2; COMB Node = 'data0:b2v_inst13\|TOUT0_cout\[3\]~COUT1_45'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.915 ns" { data0:b2v_inst13|TOUT0[3] data0:b2v_inst13|TOUT0_cout[3]~COUT1_45 } "NODE_NAME" } } { "counter.vqm" "" { Text "D:/Quartus/MCU-counter/syn/rev_1/counter.vqm" 465 24 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 0.986 ns data0:b2v_inst13\|TOUT0_cout\[4\]~COUT1_47 3 COMB LAB_X4_Y19 2 " "Info: 3: + IC(0.000 ns) + CELL(0.071 ns) = 0.986 ns; Loc. = LAB_X4_Y19; Fanout = 2; COMB Node = 'data0:b2v_inst13\|TOUT0_cout\[4\]~COUT1_47'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.071 ns" { data0:b2v_inst13|TOUT0_cout[3]~COUT1_45 data0:b2v_inst13|TOUT0_cout[4]~COUT1_47 } "NODE_NAME" } } { "counter.vqm" "" { Text "D:/Quartus/MCU-counter/syn/rev_1/counter.vqm" 465 24 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.057 ns data0:b2v_inst13\|TOUT0_cout\[5\]~COUT1_49 4 COMB LAB_X4_Y19 2 " "Info: 4: + IC(0.000 ns) + CELL(0.071 ns) = 1.057 ns; Loc. = LAB_X4_Y19; Fanout = 2; COMB Node = 'data0:b2v_inst13\|TOUT0_cout\[5\]~COUT1_49'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.071 ns" { data0:b2v_inst13|TOUT0_cout[4]~COUT1_47 data0:b2v_inst13|TOUT0_cout[5]~COUT1_49 } "NODE_NAME" } } { "counter.vqm" "" { Text "D:/Quartus/MCU-counter/syn/rev_1/counter.vqm" 465 24 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 1.128 ns data0:b2v_inst13\|TOUT0_cout\[6\]~COUT1_51 5 COMB LAB_X4_Y19 2 " "Info: 5: + IC(0.000 ns) + CELL(0.071 ns) = 1.128 ns; Loc. = LAB_X4_Y19; Fanout = 2; COMB Node = 'data0:b2v_inst13\|TOUT0_cout\[6\]~COUT1_51'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.071 ns" { data0:b2v_inst13|TOUT0_cout[5]~COUT1_49 data0:b2v_inst13|TOUT0_cout[6]~COUT1_51 } "NODE_NAME" } } { "counter.vqm" "" { Text "D:/Quartus/MCU-counter/syn/rev_1/counter.vqm" 465 24 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.228 ns) 1.356 ns data0:b2v_inst13\|TOUT0_cout\[7\] 6 COMB LAB_X4_Y19 6 " "Info: 6: + IC(0.000 ns) + CELL(0.228 ns) = 1.356 ns; Loc. = LAB_X4_Y19; Fanout = 6; COMB Node = 'data0:b2v_inst13\|TOUT0_cout\[7\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.228 ns" { data0:b2v_inst13|TOUT0_cout[6]~COUT1_51 data0:b2v_inst13|TOUT0_cout[7] } "NODE_NAME" } } { "counter.vqm" "" { Text "D:/Quartus/MCU-counter/syn/rev_1/counter.vqm" 465 24 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.120 ns) 1.476 ns data0:b2v_inst13\|TOUT0_cout\[12\] 7 COMB LAB_X4_Y18 4 " "Info: 7: + IC(0.000 ns) + CELL(0.120 ns) = 1.476 ns; Loc. = LAB_X4_Y18; Fanout = 4; COMB Node = 'data0:b2v_inst13\|TOUT0_cout\[12\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.120 ns" { data0:b2v_inst13|TOUT0_cout[7] data0:b2v_inst13|TOUT0_cout[12] } "NODE_NAME" } } { "counter.vqm" "" { Text "D:/Quartus/MCU-counter/syn/rev_1/counter.vqm" 465 24 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.601 ns) 2.077 ns data0:b2v_inst13\|TOUT0_term_combout\[15\] 8 COMB LAB_X4_Y18 1 " "Info: 8: + IC(0.000 ns) + CELL(0.601 ns) = 2.077 ns; Loc. = LAB_X4_Y18; Fanout = 1; COMB Node = 'data0:b2v_inst13\|TOUT0_term_combout\[15\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.601 ns" { data0:b2v_inst13|TOUT0_cout[12] data0:b2v_inst13|TOUT0_term_combout[15] } "NODE_NAME" } } { "counter.vqm" "" { Text "D:/Quartus/MCU-counter/syn/rev_1/counter.vqm" 464 33 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.688 ns) + CELL(0.101 ns) 2.866 ns data0:b2v_inst13\|TF0_1_a\[0\] 9 COMB LAB_X5_Y18 1 " "Info: 9: + IC(0.688 ns) + CELL(0.101 ns) = 2.866 ns; Loc. = LAB_X5_Y18; Fanout = 1; COMB Node = 'data0:b2v_inst13\|TF0_1_a\[0\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.789 ns" { data0:b2v_inst13|TOUT0_term_combout[15] data0:b2v_inst13|TF0_1_a[0] } "NODE_NAME" } } { "counter.vqm" "" { Text "D:/Quartus/MCU-counter/syn/rev_1/counter.vqm" 467 20 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.477 ns) + CELL(0.273 ns) 3.616 ns data0:b2v_inst13\|TF0_0 10 REG LAB_X5_Y18 4 " "Info: 10: + IC(0.477 ns) + CELL(0.273 ns) = 3.616 ns; Loc. = LAB_X5_Y18; Fanout = 4; REG Node = 'data0:b2v_inst13\|TF0_0'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.750 ns" { data0:b2v_inst13|TF0_1_a[0] data0:b2v_inst13|TF0_0 } "NODE_NAME" } } { "counter.vqm" "" { Text "D:/Quartus/MCU-counter/syn/rev_1/counter.vqm" 453 15 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.045 ns ( 56.55 % ) " "Info: Total cell delay = 2.045 ns ( 56.55 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.571 ns ( 43.45 % ) " "Info: Total interconnect delay = 1.571 ns ( 43.45 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.616 ns" { data0:b2v_inst13|TOUT0[3] data0:b2v_inst13|TOUT0_cout[3]~COUT1_45 data0:b2v_inst13|TOUT0_cout[4]~COUT1_47 data0:b2v_inst13|TOUT0_cout[5]~COUT1_49 data0:b2v_inst13|TOUT0_cout[6]~COUT1_51 data0:b2v_inst13|TOUT0_cout[7] data0:b2v_inst13|TOUT0_cout[12] data0:b2v_inst13|TOUT0_term_combout[15] data0:b2v_inst13|TF0_1_a[0] data0:b2v_inst13|TF0_0 } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_NOT_USED" "" "Info: The Fitter performed an Auto Fit compilation.  No optimizations were skipped because the design's timing and routability requirements required full optimization." {  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  No optimizations were skipped because the design's timing and routability requirements required full optimization." 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Oct 17 09:56:25 2006 " "Info: Processing ended: Tue Oct 17 09:56:25 2006" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:08 " "Info: Elapsed time: 00:00:08" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "D:/Quartus/MCU-counter/syn/rev_1/counter.fit.smsg " "Info: Generated suppressed messages file D:/Quartus/MCU-counter/syn/rev_1/counter.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0}