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找到约 7,641 项符合 V 的代码

uart_rx_ctl.v

//----------------------------------------------------------------------------- // // Copyright (c) 2009 Xilinx Inc. // // Project : Programmable Wave Generator // Module : uart_rx_ctl.v // P

uart_tx.v

//----------------------------------------------------------------------------- // // Copyright (c) 2009 Xilinx Inc. // // Project : Programmable Wave Generator // Module : uart_tx.v // Paren

tb_fifo.v

//----------------------------------------------------------------------------- // // Copyright (c) 2009 Xilinx Inc. // // Project : Programmable Wave Generator // Module : tb_fifo.v // Paren

char_fifo.v

/******************************************************************************* * This file is owned and controlled by Xilinx and must be used * * solely for design, simulation, i

samp_ram.v

/******************************************************************************* * (c) Copyright 1995 - 2010 Xilinx, Inc. All rights reserved. * *

clk_core_tb.v

// file: clk_core_tb.v // // (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. // // This file contains confidential and proprietary information // of Xilinx, Inc. and is protected under U

clk_core_exdes.v

// file: clk_core_exdes.v // // (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. // // This file contains confidential and proprietary information // of Xilinx, Inc. and is protected unde

clk_core.v

// file: clk_core.v // // (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved. // // This file contains confidential and proprietary information // of Xilinx, Inc. and is protected under U.S.

dac_spi.v

//----------------------------------------------------------------------------- // // Copyright (c) 2009 Xilinx Inc. // // Project : Programmable Wave Generator // Module : dac_spi.v // Paren

tb_resetgen.v

//----------------------------------------------------------------------------- // // Copyright (c) 2008 Xilinx Inc. // // Project : Programmable Wave Generator (Testbench) // Module : tb_rese