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找到约 10,000 项符合
V 的代码
counters.v
`timescale 1ns/10ps
/*****************************************************************************
$RCSfile: counters.v,v $
$Revision: 1.8 $
$Author: kohlere $
$Date: 2000/05/11 01:07:57 $
$State: Exp
control.v
`timescale 1ns/10ps
module control(nGCLK, nWAIT,
nRESET, DABORT, IABORT, nFIQ, nIRQ,
ISYNC, CHSD, CHSE, ID, IA, irq_disable, fiq_disable,
flags_ex, load_pc_me, exception_to_id,
pc, inst_if,
dcache.v
`timescale 1ns/10ps
`include "pardef"
/*****************************************************************************
$RCSfile: dcache.v,v $
$Revision: 1.15 $
$Author: kohlere $
$Date: 2000/05/04 16:31
me.v
`timescale 1ns/10ps
`include "pardef"
/*****************************************************************************
$RCSfile: me.v,v $
$Revision: 1.5 $
$Author: kohlere $
$Date: 2000/04/17 18:12:50 $
decode.v
`timescale 1ns/10ps
/*****************************************************************************
$RCSfile: decode.v,v $
$Revision: 1.1 $
$Author: kohlere $
$Date: 2000/04/10 18:17:59 $
$State: Exp $
id.v
`timescale 1ns/10ps
`include "pardef"
/*****************************************************************************
$RCSfile: id.v,v $
$Revision: 1.10 $
$Author: kohlere $
$Date: 2000/04/17 18:12:50
align.v
`timescale 1ns/10ps
/*****************************************************************************
$RCSfile: align.v,v $
$Revision: 1.1 $
$Author: kohlere $
$Date: 2000/03/24 01:52:16 $
$State: Exp $
interlock.v
`timescale 1ns/10ps
`include "pardef"
/*****************************************************************************
$RCSfile: interlock.v,v $
$Revision: 1.5 $
$Author: kohlere $
$Date: 2000/04/13 21:
vgasignal.v
/***************************************************
*VGA时序发生器,在VGA显示器上显示条纹图像,
VGA的时序图请查看工程目录下的VGA时序.PDF文档
*
*
*
****************************************************/
module VGAsignal
(
CL
convert.v
/*转换模块
用于将键盘码转换为ASCII码,并处理shift键和capslock键;
*/
module convert
( clk,
scan,
prepared,
clr,
data
);
input clk;
input [7:0] scan;
input prepared;
i