AHDL2BLF ABEL-HDL Processor PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Active+HDL 源代码
汇集 Active+HDL 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
AHDL2BLF ABEL-HDL Processor PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
/**************************************************************************** * * Open Watcom Project…
function edgedemo(action, varargin) % 子函数: % InitializeEDGEDEMO - 初始化图像、控件、轴 % ComputeEdgeMap - 调用edge.m计算原始图像的边缘图 % Sele…
Release 6.1i - xst G.23 Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : 0.0…
Release 6.1i - xst G.23 Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : 0.0…
Release 6.1i - xst G.23 Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : 0.0…
Release 6.1i - xst G.23 Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : 0.0…
Release 6.1i - xst G.23 Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : 0.0…
Release 6.2i - xst G.28 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : 0.0…