源码文件
function fm_comp(flag) % FM_COMP define settings and operations of the GUI % for creating new components % % FM_COMP(FLAG)…
Active+HDL 源代码
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源码文件
function fm_set(varargin) % FM_SET define general settings and operations for % the main window and other utilities % %FM_S…
源码文件
function fm_theme(command) % FM_THEME set PSAT theme properties % % FM_THEME(COMMAND) % COMMAND specific setting command % %s…
源码文件
function fm_bar(command) % FM_BAR draws PSAT status bar % % FM_BAR(COMMAND) % %see also FM_MAIN % %Author: Federico Milano %Dat…
源码文件
AHDL2BLF ABEL-HDL Processor PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
源码文件
@TM:1176684382 @N: CG364 :"c:\actelprj\proasic3\uart\hdl\rec.v":5:7:5:9|Synthesizing module rec @W: CL170 :"c:\actelprj\proasic3…
源码文件
Warning (10236): Verilog HDL Implicit Net warning at alu.v(8): created implicit net for "DA_No_Symbol" Warning (10236): Verilog H…
源码文件
Release 6.2i - xst G.31a Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : 0.…
源码文件
Release 7.1.04i - xst H.42 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : …
源码文件
# # hdl.var: Defines variables used by the INCA tools. # Created by ncprep on Sat Aug 4 10:51:23 2001 # softinclude $CDS_INST_DI…