select.v

60秒秒表设计

module select(sel,din0,din1,din2,din3,dout);
input [3:0]sel;
input [3:0]din0,din1,din2,din3;
output [3:0]dout;
reg  [3:0]dout;

always@(sel or din0 or din1 or din2 or din3)
  begin
    case(sel)
     4'b0001: dout=din0;
     4'b0010: dout=din1;
     4'b0100: dout=din2;
     4'b1000: dout=din3;
     default: dout=4'bxxxx;
    endcase
  end
endmodule