top_watch.map.rpt

60秒秒表设计

; CBXI_PARAMETER         ; add_sub_rnh ; Untyped                                ;
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                             ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY                           ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE                           ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                         ;
+------------------------+-------------+----------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.0 Build 33 02/05/2007 SJ Web Edition
    Info: Processing started: Thu Feb 12 13:24:49 2009
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off top_watch -c top_watch
Info: Found 1 design units, including 1 entities, in source file top_watch.v
    Info: Found entity 1: top_watch
Info: Found 1 design units, including 1 entities, in source file div192.v
    Info: Found entity 1: div192
Info: Found 1 design units, including 1 entities, in source file div_4.v
    Info: Found entity 1: div_4
Info: Found 1 design units, including 1 entities, in source file drv_cnt.v
    Info: Found entity 1: drv_cnt
Info: Found 1 design units, including 1 entities, in source file drv_dec.v
    Info: Found entity 1: drv_dec
Info: Found 1 design units, including 1 entities, in source file switch.v
    Info: Found entity 1: switch
Info: Found 1 design units, including 1 entities, in source file state.v
    Info: Found entity 1: state
Info: Found 1 design units, including 1 entities, in source file counter.v
    Info: Found entity 1: counter
Info: Found 1 design units, including 1 entities, in source file count60.v
    Info: Found entity 1: count60
Info: Found 1 design units, including 1 entities, in source file count100.v
    Info: Found entity 1: count100
Info: Found 1 design units, including 1 entities, in source file dtlatch.v
    Info: Found entity 1: dtlatch
Info: Found 1 design units, including 1 entities, in source file select.v
    Info: Found entity 1: select
Info: Found 1 design units, including 1 entities, in source file seg7_dec.v
    Info: Found entity 1: seg7_dec
Info: Elaborating entity "top_watch" for the top level hierarchy
Info: Elaborating entity "div192" for hierarchy "div192:div1"
Info: Elaborating entity "div_4" for hierarchy "div_4:div2"
Info: Elaborating entity "drv_cnt" for hierarchy "div_4:div2|drv_cnt:drv1"
Info: Elaborating entity "drv_dec" for hierarchy "div_4:div2|drv_dec:drv2"
Info: Elaborating entity "switch" for hierarchy "switch:shot1"
Info: Elaborating entity "state" for hierarchy "state:state1"
Info: Elaborating entity "counter" for hierarchy "counter:counts"
Warning (10235): Verilog HDL Always Construct warning at counter.v(24): variable "qout" is read inside the Always Construct but isn't in the Always Construct's Event Control
Info: Elaborating entity "count100" for hierarchy "counter:counts|count100:count_1"
Info: Elaborating entity "count60" for hierarchy "counter:counts|count60:count_2"
Info: Elaborating entity "dtlatch" for hierarchy "dtlatch:dtlatch1"
Info: Elaborating entity "select" for hierarchy "select:select1"
Info (10264): Verilog HDL Case Statement information at select.v(9): all case item expressions in this case statement are onehot
Info: Elaborating entity "seg7_dec" for hierarchy "seg7_dec:seg7"
Info: Inferred 1 megafunctions from design logic
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: "counter:counts|count60:count_2|high2[0]~20"
Info: Found 1 design units, including 1 entities, in source file c:/altera/70/quartus/libraries/megafunctions/lpm_counter.tdf
    Info: Found entity 1: lpm_counter
Info: Elaborated megafunction instantiation "counter:counts|count60:count_2|lpm_counter:high2_rtl_0"
Info: Found 1 design units, including 1 entities, in source file c:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf
    Info: Found entity 1: lpm_add_sub
Info: Elaborated megafunction instantiation "div192:div1|lpm_add_sub:Add0"
Info: Found 1 design units, including 1 entities, in source file c:/altera/70/quartus/libraries/megafunctions/addcore.tdf
    Info: Found entity 1: addcore
Info: Elaborated megafunction instantiation "div192:div1|lpm_add_sub:Add0|addcore:adder[0]", which is child of megafunction instantiation "div192:div1|lpm_add_sub:Add0"
Info: Instantiated megafunction "div192:div1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Found 1 design units, including 1 entities, in source file c:/altera/70/quartus/libraries/megafunctions/a_csnbuffer.tdf
    Info: Found entity 1: a_csnbuffer
Info: Elaborated megafunction instantiation "div192:div1|lpm_add_sub:Add0|addcore:adder[0]|a_csnbuffer:oflow_node", which is child of megafunction instantiation "div192:div1|lpm_add_sub:Add0"
Info: Instantiated megafunction "div192:div1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "div192:div1|lpm_add_sub:Add0|addcore:adder[0]|a_csnbuffer:result_node", which is child of megafunction instantiation "div192:div1|lpm_add_sub:Add0"
Info: Instantiated megafunction "div192:div1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Found 1 design units, including 1 entities, in source file c:/altera/70/quartus/libraries/megafunctions/look_add.tdf
    Info: Found entity 1: look_add
Info: Elaborated megafunction instantiation "div192:div1|lpm_add_sub:Add0|look_add:look_ahead_unit", which is child of megafunction instantiation "div192:div1|lpm_add_sub:Add0"
Info: Instantiated megafunction "div192:div1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Found 1 design units, including 1 entities, in source file c:/altera/70/quartus/libraries/megafunctions/altshift.tdf
    Info: Found entity 1: altshift
Info: Elaborated megafunction instantiation "div192:div1|lpm_add_sub:Add0|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "div192:div1|lpm_add_sub:Add0"
Info: Instantiated megafunction "div192:div1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "div192:div1|lpm_add_sub:Add0|altshift:carry_ext_latency_ffs", which is child of megafunction instantiation "div192:div1|lpm_add_sub:Add0"
Info: Instantiated megafunction "div192:div1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: State machine "|top_watch|state:state1|sel" contains 5 states
Info: Selected Auto state machine encoding method for state machine "|top_watch|state:state1|sel"
Info: Encoding result for state machine "|top_watch|state:state1|sel"
    Info: Completed encoding using 3 state bits
        Info: Encoded state bit "state:state1|sel.state_bit_2"
        Info: Encoded state bit "state:state1|sel.state_bit_1"
        Info: Encoded state bit "state:state1|sel.state_bit_0"
    Info: State "|top_watch|state:state1|sel.reset" uses code string "000"
    Info: State "|top_watch|state:state1|sel.lap" uses code string "100"
    Info: State "|top_watch|state:state1|sel.stop1" uses code string "001"
    Info: State "|top_watch|state:state1|sel.count" uses code string "101"
    Info: State "|top_watch|state:state1|sel.stop2" uses code string "010"
Info: Ignored 8 buffer(s)
    Info: Ignored 8 SOFT buffer(s)
Info: Promoted pin-driven signal(s) to global signal
    Info: Promoted clock signal driven by pin "clk768" to global clock signal
    Info: Promoted clear signal driven by pin "rst" to global clear signal
Info: 1 registers lost all their fanouts during netlist optimizations. The first 1 are displayed below.
    Info: Register "state1/sel~40" lost all its fanouts during netlist optimizations.
Info: Implemented 136 device resources after synthesis - the final resource count might be different
    Info: Implemented 5 input pins
    Info: Implemented 33 output pins
    Info: Implemented 95 macrocells
    Info: Implemented 3 shareable expanders
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 1 warning
    Info: Allocated 124 megabytes of memory during processing
    Info: Processing ended: Thu Feb 12 13:24:54 2009
    Info: Elapsed time: 00:00:05