secondwatch.map.smsg

用VERILOG实现的秒表 用VERILOG实现的秒表

Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Sat Jun 14 12:38:24 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off secondwatch -c secondwatch
Info: Found 1 design units, including 1 entities, in source file 16count2.v
    Info: Found entity 1: jscount
Warning: Entity "mux" obtained from "D:/MYPROGRAM/secondwatch/4mux.v" instead of from Quartus II megafunction library
Info: Found 1 design units, including 1 entities, in source file 4mux.v
    Info: Found entity 1: mux
Info: Found 1 design units, including 1 entities, in source file 7seg.v
    Info: Found entity 1: decode4_7
Info: Found 1 design units, including 1 entities, in source file 8count.v
    Info: Found entity 1: fpcount
Info: Found 1 design units, including 1 entities, in source file rlshifter.v
    Info: Found entity 1: rlshifter
Info: Found 1 design units, including 1 entities, in source file TOP_FD_III.v
    Info: Found entity 1: secondwatch
Info: Elaborating entity "secondwatch" for the top level hierarchy
Warning (10036): Verilog HDL or VHDL warning at TOP_FD_III.v(82): object "sel_sram" assigned a value but never read
Warning (10034): Output port "mem_addr[20]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[19]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[18]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[17]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[16]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[15]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[14]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[13]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[12]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[11]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[10]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[9]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[8]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[7]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[6]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[5]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[4]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[3]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[2]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[1]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "mem_addr[0]" at TOP_FD_III.v(16) has no driver
Warning (10034): Output port "sram_be[1]" at TOP_FD_III.v(20) has no driver
Warning (10034): Output port "sram_be[0]" at TOP_FD_III.v(20) has no driver
Warning (10034): Output port "sram_rd" at TOP_FD_III.v(21) has no driver
Warning (10034): Output port "sram_wr" at TOP_FD_III.v(22) has no driver
Warning (10034): Output port "sram_sel" at TOP_FD_III.v(23) has no driver
Warning (10034): Output port "flash_we" at TOP_FD_III.v(26) has no driver
Warning (10034): Output port "lcd_cs1" at TOP_FD_III.v(30) has no driver
Warning (10034): Output port "lcd_cs2" at TOP_FD_III.v(31) has no driver
Warning (10034): Output port "lcd_di" at TOP_FD_III.v(32) has no driver
Warning (10034): Output port "lcd_e" at TOP_FD_III.v(33) has no driver
Warning (10034): Output port "lcd_reset" at TOP_FD_III.v(34) has no driver
Warning (10034): Output port "lcd_rw" at TOP_FD_III.v(35) has no driver
Warning (10034): Output port "ps2_clk" at TOP_FD_III.v(37) has no driver
Warning (10034): Output port "ps2_data" at TOP_FD_III.v(38) has no driver
Warning (10034): Output port "ps2_2_clk" at TOP_FD_III.v(39) has no driver
Warning (10034): Output port "ps2_2_data" at TOP_FD_III.v(40) has no driver
Warning (10034): Output port "txd" at TOP_FD_III.v(43) has no driver
Warning (10034): Output port "txd_2" at TOP_FD_III.v(45) has no driver
Warning (10034): Output port "motor_pwm" at TOP_FD_III.v(48) has no driver
Warning (10034): Output port "da_a0" at TOP_FD_III.v(50) has no driver
Warning (10034): Output port "da_a1" at TOP_FD_III.v(51) has no driver
Warning (10034): Output port "da_data[7]" at TOP_FD_III.v(52) has no driver
Warning (10034): Output port "da_data[6]" at TOP_FD_III.v(52) has no driver
Warning (10034): Output port "da_data[5]" at TOP_FD_III.v(52) has no driver
Warning (10034): Output port "da_data[4]" at TOP_FD_III.v(52) has no driver
Warning (10034): Output port "da_data[3]" at TOP_FD_III.v(52) has no driver
Warning (10034): Output port "da_data[2]" at TOP_FD_III.v(52) has no driver
Warning (10034): Output port "da_data[1]" at TOP_FD_III.v(52) has no driver
Warning (10034): Output port "da_data[0]" at TOP_FD_III.v(52) has no driver
Warning (10034): Output port "da_ldac_n" at TOP_FD_III.v(53) has no driver
Warning (10034): Output port "da_wr_n" at TOP_FD_III.v(54) has no driver
Warning (10034): Output port "ad_convst_n" at TOP_FD_III.v(56) has no driver
Warning (10034): Output port "ad_sclk" at TOP_FD_III.v(57) has no driver
Warning (10034): Output port "ad_din" at TOP_FD_III.v(58) has no driver
Warning (10034): Output port "ad_rfs" at TOP_FD_III.v(60) has no driver
Warning (10034): Output port "ad_tfs" at TOP_FD_III.v(61) has no driver
Warning (10034): Output port "usb_addr[7]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[6]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[5]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[4]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[3]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[2]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[1]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_addr[0]" at TOP_FD_III.v(63) has no driver
Warning (10034): Output port "usb_rst_n" at TOP_FD_III.v(67) has no driver
Warning (10034): Output port "usb_cs_n" at TOP_FD_III.v(68) has no driver
Warning (10034): Output port "usb_rd_n" at TOP_FD_III.v(69) has no driver
Warning (10034): Output port "usb_wr_n" at TOP_FD_III.v(72) has no driver
Warning: Using design file fenpin.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: fenpin
Info: Elaborating entity "fenpin" for hierarchy "fenpin:fenpin_inst"
Info: Found 1 design units, including 1 entities, in source file ../../program files/altera/70/quartus/libraries/megafunctions/lpm_counter.tdf
    Info: Found entity 1: lpm_counter
Info: Elaborating entity "lpm_counter" for hierarchy "fenpin:fenpin_inst|lpm_counter:lpm_counter_component"
Info: Elaborated megafunction instantiation "fenpin:fenpin_inst|lpm_counter:lpm_counter_component"
Info: Found 1 design units, including 1 entities, in source file db/cntr_mdj.tdf
    Info: Found entity 1: cntr_mdj
Info: Elaborating entity "cntr_mdj" for hierarchy "fenpin:fenpin_inst|lpm_counter:lpm_counter_component|cntr_mdj:auto_generated"
Info: Elaborating entity "rlshifter" for hierarchy "rlshifter:rlshifter_sl"
Info: Elaborating entity "fpcount" for hierarchy "fpcount:fpcount_sl"
Warning (10230): Verilog HDL assignment warning at 8count.v(18): truncated value with size 32 to match size of target (8)
Warning (10230): Verilog HDL assignment warning at 8count.v(23): truncated value with size 32 to match size of target (8)
Info: Elaborating entity "mux" for hierarchy "mux:mux_sl"
Info (10264): Verilog HDL Case Statement information at 4mux.v(9): all case item expressions in this case statement are onehot
Info: Elaborating entity "decode4_7" for hierarchy "decode4_7:decode4_7_sl"
Warning (10270): Verilog HDL Case Statement warning at 7seg.v(9): incomplete case statement has no default case item
Warning (10240): Verilog HDL Always Construct warning at 7seg.v(7): inferring latch(es) for variable "seg", which holds its previous value in one or more paths through the always construct
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[6]"
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[5]"
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[4]"
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[3]"
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[2]"
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[1]"
Info (10041): Verilog HDL or VHDL info at 7seg.v(9): inferred latch for "seg[0]"
Info: Elaborating entity "jscount" for hierarchy "jscount:jscount_sl"
Warning (10230): Verilog HDL assignment warning at 16count2.v(13): truncated value with size 32 to match size of target (16)
Warning (10230): Verilog HDL assignment warning at 16count2.v(16): truncated value with size 32 to match size of target (16)
Warning (10230): Verilog HDL assignment warning at 16count2.v(19): truncated value with size 32 to match size of target (16)
Warning (10230): Verilog HDL assignment warning at 16count2.v(22): truncated value with size 32 to match size of target (16)
Warning: Port "out1" on the entity instantiation of "jscount_sl" is connected to a signal of width 1. The formal width of the signal in the module is 4.  Extra bits will be left dangling without any fanout logic.
Warning: Port "out2" on the entity instantiation of "jscount_sl" is connected to a signal of width 1. The formal width of the signal in the module is 4.  Extra bits will be left dangling without any fanout logic.
Warning: Port "out3" on the entity instantiation of "jscount_sl" is connected to a signal of width 1. The formal width of the signal in the module is 4.  Extra bits will be left dangling without any fanout logic.
Warning: Port "out4" on the entity instantiation of "jscount_sl" is connected to a signal of width 1. The formal width of the signal in the module is 4.  Extra bits will be left dangling without any fanout logic.
Warning: Port "seg" on the entity instantiation of "decode4_7_sl" is connected to a signal of width 8. The formal width of the signal in the module is 7.  Extra bits will be left dangling without any fanout logic.
Warning: Port "in1" on the entity instantiation of "mux_sl" is connected to a signal of width 1. The formal width of the signal in the module is 4.  Extra bits will be driven by GND.