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V 的代码
apb.v
// ________________________________________________________________ apb.v ___
//
// Interface model for ARM APB (AMBA Peripheral Bus),
// used as an example of inter-module communication
// with i
defs.v
// defs.v
//
// Globally visible typedefs for the CORDIC rotator model,
// bus interface and associated testbench
//
// Revision information:
// =====================
//
// 0.0 15-Jan-2004 J
sysid.v
//Copyright (C) 1991-2004 Altera Corporation
//Any megafunction design, and related net list (encrypted or decrypted),
//support information, device programming or simulation file, and any other
//
mult.v
// megafunction wizard: %LPM_MULT%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: lpm_mult
// ============================================================
// File Name: mult.v
// Megafu
ram.v
// megafunction wizard: %LPM_RAM_DP+%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: altsyncram
// ============================================================
// File Name: ram.v
// Me
v.c
main (int *p)
{
int a;
a = 0;
p[1] = a;
a = 0;
p[2] = a;
a = 123456;
p[3] = a;
}
verilog.v
// generated by newgenasym Fri Mar 16 13:12:38 2001
module bnc_conn (agnd1, agnd2, agnd3, agnd4, center);
inout agnd1;
inout agnd2;
inout agnd3;
inout agnd4;
inout center;
verilog.v
// generated by newgenasym Fri Mar 16 13:33:15 2001
module inductor (a, b);
inout a;
inout b;
initial
begin
end
endmodule
verilog.v
// generated by newgenasym Fri Mar 16 11:48:43 2001
module res (a, b);
inout a;
inout b;
initial
begin
end
endmodule
verilog.v
// generated by newgenasym Thu Mar 22 14:14:15 2001
module \20l10 (i1, i10, i11, i12, i2, i3, i4, i5, i6, i7, i8, i9, o1, o10, o2, o3,
o4, o5, o6, o7, o8, o9);
input i1;
input i10;