Active+HDL 源代码

汇集 Active+HDL 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。

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源码文件

function save_window_pos(target_window_h0) % save window position including size and position information %% %% Kriging Softwa…

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function close_window(window_index) % funstion close_window(window_index) % close window based on the window index %% %% …

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function slider_action(window_index,option) %% change corresponding edit field based on the slider position and update theoret…

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function popupmenu_action(window_index,popupmenu_index) % popup menu action % window_index = index of process task % …

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function initialization() % function initialization perform initialization global para color data hdl curDir=pwd; …

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function []=mapax(nminlong,ndiglong,nminlat,ndiglat,hdl,axis_opt); % function []=mapax(nminlong,ndiglong,nminlat,ndiglat,hdl,axis…

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Warning (10273): Verilog HDL warning at DC_Count.v(54): extended using "x" or "z"

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Release 7.1i - xst H.38 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : 0.0…

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AHDL2BLF ABEL-HDL Processor PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.

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NewProject(E:/myprojects/spi_blaze_mycore_32bit/pcores/ad_7266_32_v1_00_a/devl/projnav/ad_7266_32.ise) SetProperty(Device Family,…