代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
www.eeworm.com/read/250454/12405846
vhd dff8.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY dff8 IS
PORT( clk : IN STD_LOGIC;
clear : IN STD_LOGIC;
Din : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
Dout : OUT STD_LOGIC_V
www.eeworm.com/read/149023/12408890
vhd serial_generatedinstance.vhd
--------------------------------------------------
-- Model : 8051 Behavioral Model,
-- VHDL Entity mc8051.serial.generatedInstance
--
-- Author : Michael Mayer (
www.eeworm.com/read/149022/12409115
vhd iface.vhd
-----------------------------------------------------------------------------
-- This file is a part of the LEON VHDL model
-- Copyright (C) 1999 European Space Agency (ESA)
--
-- This program
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vhd leon.vhd
-----------------------------------------------------------------------------
-- This file is a part of the LEON VHDL model
-- Copyright (C) 1999 European Space Agency (ESA)
--
-- This program
www.eeworm.com/read/149022/12409162
vhd dma.vhd
-----------------------------------------------------------------------------
-- This file is a part of the LEON VHDL model
-- Copyright (C) 1999 European Space Agency (ESA)
--
-- This program
www.eeworm.com/read/149022/12409348
vhd testmod.vhd
-----------------------------------------------------------------------------
-- This file is a part of the LEON VHDL model
-- Copyright (C) 1999 European Space Agency (ESA)
--
-- This program
www.eeworm.com/read/149022/12409366
vhd leonlib.vhd
-----------------------------------------------------------------------------
-- This file is a part of the LEON VHDL model
-- Copyright (C) 1999 European Space Agency (ESA)
--
-- This program
www.eeworm.com/read/149022/12409375
vhd tb_msp.vhd
-----------------------------------------------------------------------------
-- This file is a part of the LEON VHDL model
-- Copyright (C) 1999 European Space Agency (ESA)
--
-- This program
www.eeworm.com/read/148725/12432997
cmp ddr_sdram.cmp
-- Generated by DDR SDRAM Controller 3.2.0 [Altera, IP Toolbench v1.2.9 build43]
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS
www.eeworm.com/read/336535/12438086
vhd dds.vhd
--DDS.VHDL
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY DDS IS
PORT(M:IN STD_LOGIC_VECTOR(7 DOWNTO 0);
EN:IN STD_LOGIC;
RESET:IN STD_LOGIC;
CLK:IN