代码搜索:Verilog

找到约 10,000 项符合「Verilog」的源代码

代码结果 10,000
www.eeworm.com/read/233075/4694817

v verilog.v

// generated by newgenasym Thu Mar 22 14:43:11 2001 module tle2037 (\in+ , \in- , n1, n2, out, \v+ , \v- ); inout \in+ ; inout \in- ; inout n1; inout n2; inout out; inout \v
www.eeworm.com/read/233075/4694826

v verilog.v

// generated by newgenasym Thu Mar 22 14:14:53 2001 module act574 (clk, d0, d1, d2, d3, d4, d5, d6, d7, oe, q0, q1, q2, q3, q4, q5, q6, q7); input clk; input d0; input d1; i
www.eeworm.com/read/233075/4694835

v verilog.v

// generated by genview Wed Apr 15 08:29:54 1998 module blockin (a); inout a; initial begin end endmodule
www.eeworm.com/read/233075/4694842

v verilog.v

// generated by newgenasym Thu Mar 22 14:27:02 2001 module epf8282a (add, add0, add14, add15, add16, add17, add18, bd, clkusr, conf_done, data0, data1, data2, data3, data4, data5, dclk,
www.eeworm.com/read/233075/4694851

v verilog.v

// generated by newgenasym Thu Mar 22 14:22:42 2001 module dg419 (d, gnd, in, s1, s2, \v+ , \v- , vl); inout d; inout gnd; inout in; inout s1; inout s2; inout \v+ ; inou
www.eeworm.com/read/233075/4694860

v verilog.v

// generated by newgenasym Fri Mar 16 11:23:24 2001 module cap_np (a, b); inout a; inout b; initial begin end endmodule
www.eeworm.com/read/233075/4694868

v verilog.v

// generated by genview Wed Apr 15 08:26:06 1998 module blockout (a); inout a; initial begin end endmodule
www.eeworm.com/read/233075/4694875

v verilog.v

// generated by newgenasym Fri Mar 16 11:23:04 2001 module cap (a, b); inout a; inout b; initial begin end endmodule
www.eeworm.com/read/233075/4694887

v verilog.v

// generated by newgenasym Fri Mar 16 12:55:13 2001 module photo_diode (anode, cathode); inout anode; inout cathode; initial begin end endmodule
www.eeworm.com/read/233075/4694899

v verilog.v

// generated by NetAssembler Version 14.00-p003 Oct 18th, 2000 12:00:00 IST // on Tue Mar 20 15:11:47 2001 `timescale 1ns/1ns `define scale_fs * 0.000001000000000 `define scale_ps * 0.001000000000