代码搜索:Process

找到约 10,000 项符合「Process」的源代码

代码结果 10,000
www.eeworm.com/read/436723/7763385

vhd demodulation.vhd

library ieee; use ieee.std_logic_arith.all; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity demodulation is port(clk :in std_logic; start :in std_logic
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vhd jietiao.vhd

library ieee; use ieee.std_logic_arith.all; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity jietiao is port(clk :in std_logic; start :in std_logic;
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vhd modulation.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity modulation is port(clk,start,x:in std_logic; a:out std_logic; y:out std_logic); end mo
www.eeworm.com/read/436250/7774207

c execl.c

#include #include void main(void) { printf("About to call child process\n\n"); execl("CHILD.EXE", "CHILD.EXE", "AAA", "BBB", "CCC", NULL); printf("\n\nBa
www.eeworm.com/read/435916/7781335

plg snakegame.plg

礦ision3 Build Log Project: C:\Documents and Settings\lenovo\桌面\贪吃蛇\SnakeGame\SnakeGame.uv2 Project File Date: 07/12/2008 Output: Build target
www.eeworm.com/read/435661/7788109

txt 计数器.txt

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; ENTITY adder IS PORT(cr,ld,clk,a0,a1,a2,a3:IN STD_LOGIC; q:OUT STD_ULOGIC_VECTOR(3 DOWNTO 0); ) END
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txt jk.txt

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY jkdff IS PORT(j, k : IN STD_LOGIC; Clk : IN STD_LOGIC; q, qb : OUT STD_LOGIC); END jkdff; ARCHITECTURE a OF jkdff IS SIGNAL qtmp,qbtmp:STD_LOG
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txt rs.txt

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY rsff IS PORT(s :IN BIT; r :IN BIT; q :OUT BIT; qb :OUT BIT); END rsff; ARCHITECTURE rtl OF rsff IS BEGIN
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plg 双向流动.plg

Build target 'Target 1' compiling 双向流动.c... linking... "双向流动" - 0 Error(s), 0 Warning(s). Build target 'Target 1' compiling 双向流动.c... linking... creating hex file from "双向流动"... "双向流动" - 0 Error(s), 0
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plg lcd1602.plg

礦ision2 Build Log Project: C:\Documents and Settings\Administrator\桌面\字符液晶1602\Keil\LCD1602.uv2 Project File Date: 09/18/2005 Output: Build ta