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Logic Analyzer 的代码
suocun.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY suocun IS
PORT(
IN2:IN STD_LOGIC_VECTOR(10 DOWNTO 0);
IN3:IN
vga_main.vhd
---------------------------------------------------------------------
-- vga_main.vhd Demo VGA configuration module.
---------------------------------------------------------------------
-- Autho
cannon.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity cannon is
Port ( clk : in std_logic;
reset : in std_logic;
add-sub-and-or.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;
entity ALU32 is
port ( Opcode : in std_logic_vector(1 downto 0);
SrcA : in std_logic
lock.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_signed.all;
entity lock is
port(a:in std_logic_vector(9 downto 0);
b:in std_logic_vector(9 downto 0);
en,clk:in std_logic;
cpu8bit.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity CPU8bit is
Port ( clock : in STD_LOGIC;
reset : in STD_LOGIC);
end C
新建 文本文档.txt
entity top is
Port (sysclk : in std_logic;
reset : in std_logic;
light_on : in std_logic;
light_off : in std_logic;
lcd_w : in std_logic; --when the button ispressed, t
新建 文本文档.txt
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity vgacore is
Port ( clk : in std_logic;
reset : in std_logic;
top.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity top is
generic(n:integer:=16);
port(clk:in std_logic;
clr:in std_logic;
ena:in std_logic;
di:in std_logic_vector(7
jtop.vhdl
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity jtop is
generic(n:integer:=16);
port(clk:in std_logic;
clr:in std_logic;
ena:in std_logic;
di:in std_logic_vector(