代码搜索：CSF
找到约 622 项符合「CSF」的源代码
代码结果 622
www.eeworm.com/read/132625/14082591
rpt iicrd.csf.rpt
iicrd - Quartus II Compilation Report File
-------------------------------------------------------------------------------
+------------------------------------------------------------------------
www.eeworm.com/read/132625/14082615
msg iicrd.csf.msg
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "D:\\all_work\\standard\\iicmainrd_32\\iicrd.vhd 2 1 " "Found 2 design units and 1 entities in source file D:\\all_work\\standard\\iicmainrd_32\\iicrd
www.eeworm.com/read/203724/15352620
qmsg muxcntlr.csf.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Qua
www.eeworm.com/read/112818/15476100
csf cyclone32.csf
DEFAULT_DEVICE_OPTIONS
{
GENERATE_CONFIG_HEXOUT_FILE = OFF;
GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON;
GENERATE_CONFIG_JBC_FILE = OFF;
GENERATE_CONFIG_JAM_FILE = OFF;
GENERATE_CONFIG_ISC_FIL
www.eeworm.com/read/109665/15552516
csf remote_reconfiguration.csf
AUTO_SLD_HUB_ENTITY
{
AUTO_INSERT_SLD_HUB_ENTITY = ENABLE;
HUB_INSTANCE_NAME = sld_hub_inst;
HUB_ENTITY_NAME = sld_hub;
}
DEFAULT_DEVICE_OPTIONS
{
GENERATE_CONFIG_HEXOUT_FILE = OFF;
GENE
www.eeworm.com/read/103567/15728854
csf ddr_sdram.csf
DEFAULT_DEVICE_OPTIONS
{
RESERVE_PIN = "AS INPUT TRI-STATED";
RESERVE_ALL_UNUSED_PINS = "AS OUTPUT DRIVING GROUND";
HEXOUT_FILE_COUNT_DIRECTION = UP;
HEXOUT_FILE_START_ADDRESS = 0;
GENERATE
www.eeworm.com/read/102365/15784953
csf ddr_sdram.csf
REPORT_TAN_TSU_SETTINGS("||Compilation Report||Results for \"ddr_sdram\" Compiler Settings||Timing Analyses||tco (Clock to Output Delays)")
{
REPORT_OUTPUT_SECTION = ON;
PAGE_ORIENTATION = PORTRA
www.eeworm.com/read/291878/8391360
rpt fdwt_all.csf.rpt
FDWT_ALL - Quartus II Compilation Report File
-------------------------------------------------------------------------------
+---------------------------------------------------------------------
www.eeworm.com/read/291878/8391524
msg fdwt_all.csf.msg
{ Info "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "0 0 F:\\Program_Back\\Verilog\\DWT\\OK_PC\\97_2D_1Level\\FPGA\\FDWT_ALL.vwf " "Found 0 design units and 0 entities in source file F:\\Program_Back\\Ver
www.eeworm.com/read/389471/8517880
qmsg digital_clk.csf.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Qua