claadder.v

6x6 bit digital multiplier

module CLAadder(A,B,C0,S);
input [5:0] A,B;
input C0;
output [5:0] S;

wire P0,P1,P2,P3,P4,P5;
wire G0,G1,G2,G3,G4,G5;
wire C1,C2,C3,C4,C5;
wire temp0;
wire temp11,temp12;
wire temp21,temp22,temp23;
wire temp31,temp32,temp33,P0_3,G0_3,temp30;
wire temp41,temp42,temp43,P1_4,G1_4,temp401,temp402;

PFA adder0 (A[0],B[0],P0,G0);
PFA adder1 (A[1],B[1],P1,G1);
PFA adder2 (A[2],B[2],P2,G2);
PFA adder3 (A[3],B[3],P3,G3);
PFA adder4 (A[4],B[4],P4,G4);
PFA adder5 (A[5],B[5],P5,G5);

and (temp0,P0,C0);
or (C1,G0,temp0);

and (temp11,P1,G0);
and (temp12,P1,P0,C0);
or (C2,temp11,temp12,G1);

and (temp21,P2,G1);
and (temp22,P2,P1,G0);
and (temp23,P2,P1,P0,C0);
or (C3,temp21,temp22,temp23,G2);

and (P0_3,P3,P2,P1,P0);
and (temp31,P3,G2);
and (temp32,P3,P2,G1);
and (temp33,P3,P2,P1,G0);
or (G0_3,G3,temp31,temp32,temp33);
and (temp30,P0_3,C0);
or (C4,temp30,G0_3);

and (P1_4,P4,P3,P2,P1);
and (temp41,P4,G3);
and (temp42,P4,P3,G2);
and (temp43,P4,P3,P2,G1);
or (G1_4,G4,temp41,temp42,temp43);
and (temp401,P1_4,G0);
and (temp402,P1_4,P0,C0);
or (C5,temp401,temp402,G1_4);

xor (S[0],P0,C0);
xor (S[1],P1,C1);
xor (S[2],P2,C2);
xor (S[3],P3,C3);
xor (S[4],P4,C4);
xor (S[5],P5,C5);

endmodule