shr2_shru2.v

verilog, TMSC6415 S单元代码

module SHR2_SHRU2(
                  //Right_Shifter_16_Result,
                  DC_B_Src2,
                  DC_B_Src1,
                  DC_SHR2,
                  DC_SHRU2,
                  DC_U,
                  SHR2_SHRU2_write_reg,
                  S_B_UWrite_Data,
                  en_instruction_execute);
                  
//input [31:0]  Right_Shifter_16_Result;
input [31:0]  DC_B_Src2;
input [4:0]   DC_B_Src1;
input         DC_SHR2;
input         DC_SHRU2;
input         DC_U;
input         en_instruction_execute;
 


output         SHR2_SHRU2_write_reg;
output [31:0]  S_B_UWrite_Data;

wire        	use_result;
wire [31:0] Right_Shifter_16_Result;

//reg  [31:0] 	dst_low_32;
   
assign use_result=(DC_SHR2||DC_SHRU2);
assign SHR2_SHRU2_write_reg=en_instruction_execute&&use_result;
assign S_B_UWrite_Data=(DC_SHR2||DC_SHRU2)?{Right_Shifter_16_Result[31:16],Right_Shifter_16_Result[15:0]}:32'b0;



/*always @(DC_B_Src1 or DC_B_Src2  or DC_U or DC_SHR2 or DC_SHRU2 or Right_Shifter_16_Result )
begin
    
  dst_low_32=32'h0;
   
    if (use_result) begin																	//C64
  dst_low_32={Right_Shifter_16_Result[31:16],Right_Shifter_16_Result[15:0]};
  end
end */ 

S_Right_Shifter_16 Right_Shifter_16hign (
				.src (DC_B_Src2 [31:16]),
				.count(DC_B_Src1[4:0] ),
				.unsign(DC_U),
				.result(Right_Shifter_16_Result[31:16])
				);

S_Right_Shifter_16 Right_Shifter_16low (
				.src (DC_B_Src2 [15:0]),
				.count(DC_B_Src1[4:0] ),
				.unsign(DC_U),
				.result(Right_Shifter_16_Result[15:0])
				);

endmodule