The objective of this project is to create a driver for a camera module (we used the OV7620). After - 免费下载

VHDL/FPGA/Verilog资源 文件大小：6 K

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资源简介

The objective of this project is to create a driver for a camera module (we used the OV7620). After taking the image with the camera, the driver will store into the external asynchronous RAM, and then send it to the computer through a serial cable

源码文件列表

📂 共 7 个源码文件 点击文件名可在线查看源代码

1 📄
async_transmitter.v
大小: 2.53 KB
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2 📄
root.v
大小: 1.48 KB
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3 📄
hexdisplay.v
大小: 3.03 KB
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4 📄
camera.v
大小: 1.17 KB
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5 📄
root.ucf
大小: 1.98 KB
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6 📄
rs232.v
大小: 1.11 KB
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7 📄
testbench.v
大小: 1.84 KB
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