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找到约 7,641 项符合
V 的代码
verilog.v
// generated by newgenasym Tue Nov 04 09:38:37 2008
module ic_and (in1, in2, out);
input in1;
input in2;
output out;
initial
begin
end
endmodule
verilog.v
// generated by newgenasym Fri Dec 19 00:01:14 2008
module dsub25gnd (mt1, mt2, p1, p10, p11, p12, p13, p14, p15, p16, p17, p18, p19,
p2, p20, p21, p22, p23, p24, p25, p3, p4, p5, p6, p7, p
verilog.v
// generated by newgenasym Fri Dec 19 00:01:13 2008
module fci_10061913_102clf (a1, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a2, a20,
a21, a22, a23, a24, a25, a26, a27, a28, a29, a
verilog.v
// generated by newgenasym Fri Dec 19 00:01:11 2008
module smb (a, b0, b1, b2, b3);
inout a;
inout b0;
inout b1;
inout b2;
inout b3;
initial
begin
end
end
verilog.v
// generated by newgenasym Tue Oct 28 09:37:56 2008
module respoti (a, b, t);
inout a;
inout b;
inout t;
initial
begin
end
endmodule
verilog.v
// generated by newgenasym Wed Oct 29 14:21:42 2008
module res (a, b);
inout a;
inout b;
initial
begin
end
endmodule
verilog.v
// generated by newgenasym Tue Nov 04 09:31:32 2008
module res4s (a, b);
parameter size = 1;
inout [size-1:0] a;
inout [size-1:0] b;
initial
begin
end
endmodul
verilog.v
// generated by newgenasym Wed Oct 29 14:16:34 2008
module ind (a, b);
inout a;
inout b;
initial
begin
end
endmodule
verilog.v
// generated by newgenasym Wed Oct 29 14:15:22 2008
module cappol (n, p);
inout n;
inout p;
initial
begin
end
endmodule
verilog.v
// generated by newgenasym Wed Oct 29 14:14:55 2008
module cap (a, b);
inout a;
inout b;
initial
begin
end
endmodule