This document gives the code for programming a CC2500 transceiver using Altera Stratix FPGA. The FPGA and CC2500 are connected through SPI mode with the FPGA as the master and CC2500 as the slave.
标签： programming transceiver document Stratix
上传时间： 2014-01-15
上传用户：wuyuying
Introduction to I/O Kit Device Driver Design Guidelines Chapter 1 The libkern C++ Runtime Chapter 2 libkern Collection and Container Classes Chapter 3 The IOService API Chapter 4 Making Hardware Accessible to Applications Chapter 5 Kernel-User Notification Chapter 6 Displaying Localized Information About Drivers Chapter 7 Debugging Drivers Chapter 8 Testing and Deploying Drivers Chapter 9 Developing a Device Driver to Run on an Intel-Based Macintosh
标签： Chapter Introduction Guidelines Runtime
上传时间： 2017-07-04
上传用户：冇尾飞铊
This program requires the DSP2833x header files. // // This program requires an external I2C RTC connected to // the I2C bus at address 0x6f. // // As supplied, this project is configured for "boot to SARAM" // operation. The 2833x Boot Mode table is shown below. // For information on configuring the boot mode of an eZdsp, // please refer to the documentation included with the eZdsp,
标签： requires program This external
上传时间： 2017-07-12
上传用户：dianxin61
This program requires the DSP2833x header files. // // As supplied, this project is configured for "boot to SARAM" // operation. The 2833x Boot Mode table is shown below. // For information on configuring the boot mode of an eZdsp, // please refer to the documentation included with the eZdsp,
标签： configured requires supplied program
上传时间： 2014-01-10
上传用户：lixinxiang
This software is developed to provide ease with controller design. For PID control, options are given to design and analyse the compensated and uncompensated system. You are free to choice among Proportional PI, PD and PID mode of control. Both frequency and time domain characteristics can be observed. Special Menus are given to observe time and frequency response plots. For Statefeedback controller similar options are given. But this is limited to second order system only.
标签： controller developed software control
上传时间： 2017-07-25
上传用户：aysyzxzm
RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit is present on the output marked Q. Normally, in storage mode, the S and R inputs are both low, and feedback maintains the Q and Q outputs in a constant state, with Q the complement of Q. If S (Set) is pulsed high while R is held low, then the Q output is forced high, and stays high when S returns to low similarly, if R (Reset) is pulsed high while S is held low, then the Q output is forced low, and stays low when R returns to low.
标签： using fundamental the RS_latch
上传时间： 2017-07-30
上传用户：努力努力再努力
hese are the zip files that are associated with application note ADSP-BF533 Blackfin Booting Process (EE-240) example.zip: Used throughout the EE-note to explain in detail the various booting modes. BF533 Ez Kit Multiple DXE Boot.zip: Multi-DXE Boot Example used with the ADSP-BF533 Ez-Kit Lite. Host Boot.zip: Example Host code to demonstrate SPI Slave Mode Booting Program_Atmel.zip: Example code that programs the Atmel DataFlashes via an ADSP-BF532 Processor All programs have been written for VisualDSP++ 3.5
标签： application associated are Blackfin
上传时间： 2017-07-30
上传用户：tonyshao
将s3c2410-linux-2.6.11.1-apm-08.11.02.patch复制到内核根目录。 执行patch –p1 < s3c2410-linux-2.6.11.1-apm-08.11.02.patch即可！ 在2.6.11.1内核中，创建字符设备的代码是：linux/arch/arm/kernel/amp.c。在根文件系统创建设备节点是dev/misc/apm_bios。
上传时间： 2017-07-31
上传用户：jeffery
基于T-ENGINE环境，在T-KERNEL内核的开发板SH7145上，实现跑马灯功能。
上传时间： 2014-02-15
上传用户：gmh1314
PGP SDK 包括大范围的标准加密、数字签名和编解码技术，以及各种网络安全协议执行程序。PGP SDK为开发人员提供同其他PGP产品核心相同的核加密功能。 PGP SDK技术说明：PGP SDK是我们的加密和密钥管理库的C接口，支持以下平台： · Windows 98, Millennium (ME), NT, 2000, and XP · Mac OS X · Linux x86 with 2.0.x kernel or later · Sun Solaris SPARC 2.5.1, 2.6, 2.7, or 2.8
上传时间： 2014-12-08
上传用户：四只眼
