verilog work i2c_master_bit_ctrl.v verilog work i2c_master_byte_ctrl.v
Verilog 源代码
VerilogHDL是一种硬件描述语言,以文本形式来描述数字系统硬件的结构和行为的语言,用它可以表示逻辑电路图、逻辑表达式,还可以表示数字逻辑系统所完成的逻辑功能。VerilogHDL和VHDL是世界上最流行的两种硬件描述语言,都是在20世纪80年代中期开发出来的。前者由Gate…
verilog work "FIFO.v" verilog work "testfifo.v"
verilog work "dff.v" verilog work "ripple.v"
verilog verilog "lab.v" verilog work "top.v"
gtkwave verilog.vcd gtkv_save
verilog work i2c_master_bit_ctrl.v verilog work i2c_master_byte_ctrl.v
verilog work i2c_master_bit_ctrl.v verilog work i2c_master_byte_ctrl.v
verilog work i2c_master_bit_ctrl.v verilog work i2c_master_byte_ctrl.v
verilog work i2c_master_bit_ctrl.v verilog work i2c_master_byte_ctrl.v
verilog work i2c_master_bit_ctrl.v verilog work i2c_master_byte_ctrl.v