Verilog-A

是一本好书,verilog HDL,a guide to digital design and synthesis

是一本好书,verilog HDL,a guide to digital design and synthesis

标签： synthesis verilog digital design

上传时间： 2015-07-14

上传用户：熊少锋
Verilog HDL: Magnitude For a vector (a,b), the magnitude representation is the following: A c

Verilog HDL: Magnitude For a vector (a,b), the magnitude representation is the following: A common approach to implementing these arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algorithm calculates the trigonometric functions of sine, cosine, magnitude, and phase using an iterative process. It is made up of a series of micro-rotations of the vector by a set of predetermined constants, which are powers of two. Using binary arithmetic, this algorithm essentially replaces multipliers with shift and add operations. In a Stratix™ device, it is possible to calculate some of these arithmetic functions directly, without having to implement the CORDIC algorithm.

标签： representation Magnitude the magnitude

上传时间： 2013-12-24

上传用户：金宜
Verilog HDL Synthesis, A Practical Primer 学习Verilog HDL一本很不错的英文书

Verilog HDL Synthesis, A Practical Primer 学习Verilog HDL一本很不错的英文书，比较透彻

标签： Verilog HDL Synthesis Practical

上传时间： 2016-01-19

上传用户：hongmo
this is a verilog hdl language referance book , tell you the basic useage of this language.

this is a verilog hdl language referance book , tell you the basic useage of this language.

标签： language this referance verilog

上传时间： 2016-02-06

上传用户：日光微澜
PacoBlaze is a from-scratch synthesizable & behavioral Verilog clone of Ken Chapman s popular PicoB

PacoBlaze is a from-scratch synthesizable & behavioral Verilog clone of Ken Chapman s popular PicoBlaze embedded microcontroller. by Pablo Bleyer Kocik

标签： synthesizable from-scratch behavioral PacoBlaze

上传时间： 2013-12-09

上传用户：hphh
vga verilog codes which design a pong game and output to vga monitor

vga verilog codes which design a pong game and output to vga monitor

标签： vga verilog monitor design

上传时间： 2013-12-31

上传用户：牛布牛
编写verilog代码利用实验箱上的A/D芯片完成模数转换。输入电压由实验箱提供

编写verilog代码利用实验箱上的A/D芯片完成模数转换。输入电压由实验箱提供，其幅值在0~5V间变化，由电位器控制。输出信号显示输入的模拟电压值，由数码管显示为2位BCD码的形式。

标签： verilog 实验箱编写代码

上传时间： 2013-12-16

上传用户：songnanhua
this a Uart source code using Verilog.

this a Uart source code using Verilog.

标签： Verilog source using this

上传时间： 2016-05-19

上传用户：zsjzc
This Verilog HDL description implements a UART Version 1.1 : Original Creation 2.1 : added commen

This Verilog HDL description implements a UART Version 1.1 : Original Creation 2.1 : added comments

标签： description implements Creation Original

上传时间： 2016-05-27

上传用户：1109003457
(2003 prentice-hall)verilog hdl：a guide to digital design and synthesis(2nd edition).rar

(2003 prentice-hall)verilog hdl：a guide to digital design and synthesis(2nd edition).rar

标签： prentice-hall synthesis digital edition

上传时间： 2014-01-17

上传用户：teddysha