This texts contemporary approach focuses on the concepts of linear control systems, rather than computational mechanics. Straightforward coverage includes an integrated treatment of both classical and modern control system methods. The text emphasizes design with discussions of problem formulation, design criteria, physical constraints, several design methods, and implementation of compensators.Discussions of topics not found in other texts--such as pole placement, model matching and robust tracking--add to the texts cutting-edge presentation. Students will appreciate the applications and discussions of practical aspects, including the leading problem in developing block diagrams, noise, disturbances, and plant perturbations. State feedback and state estimators are designed using state variable equations and transfer functions, offering a comparison of the two approaches. The incorporation of MATLAB throughout the text helps students to avoid time-consuming computation and concentrate on control system design and analysis
标签： 控制系统
上传时间： 2021-12-15
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基于FPGA设计的字符VGA LCD显示实验Verilog逻辑源码Quartus工程文件+文档说明,通过字符转换工具将字符转换为 8 进制 mif 文件存放到单端口的 ROM IP 核中，再从ROM 中把转换后的数据读取出来显示到 VGA 上，FPGA型号Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。module top( input clk, input rst_n, //vga output output vga_out_hs, //vga horizontal synchronization output vga_out_vs, //vga vertical synchronization output[4:0] vga_out_r, //vga red output[5:0] vga_out_g, //vga green output[4:0] vga_out_b //vga blue );wire video_clk;wire video_hs;wire video_vs;wire video_de;wire[7:0] video_r;wire[7:0] video_g;wire[7:0] video_b;wire osd_hs;wire osd_vs;wire osd_de;wire[7:0] osd_r;wire[7:0] osd_g;wire[7:0] osd_b;assign vga_out_hs = osd_hs;assign vga_out_vs = osd_vs;assign vga_out_r = osd_r[7:3]; //discard low bit dataassign vga_out_g = osd_g[7:2]; //discard low bit dataassign vga_out_b = osd_b[7:3]; //discard low bit data//generate video pixel clockvideo_pll video_pll_m0( .inclk0 (clk ), .c0 (video_clk ));color_bar color_bar_m0( .clk (video_clk ), .rst (~rst_n ), .hs (video_hs ), .vs (video_vs ), .de (video_de ), .rgb_r (video_r ), .rgb_g (video_g ), .rgb_b (video_b ));osd_display osd_display_m0( .rst_n (rst_n ), .pclk (video_clk ), .i_hs (video_hs ), .i_vs (video_vs ), .i_de (video_de ), .i_data ({video_r,video_g,video_b} ), .o_hs (osd_hs ), .o_vs (osd_vs ), .o_de (osd_de ), .o_data ({osd_r,osd_g,osd_b} ));endmodule
上传时间： 2021-12-18
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基于FPGA设计的vga显示测试实验Verilog逻辑源码Quartus工程文件+文档说明，FPGA型号Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。module top( input clk, input rst_n, //vga output output vga_out_hs, //vga horizontal synchronization output vga_out_vs, //vga vertical synchronization output[4:0] vga_out_r, //vga red output[5:0] vga_out_g, //vga green output[4:0] vga_out_b //vga blue );wire video_clk;wire video_hs;wire video_vs;wire video_de;wire[7:0] video_r;wire[7:0] video_g;wire[7:0] video_b;assign vga_out_hs = video_hs;assign vga_out_vs = video_vs;assign vga_out_r = video_r[7:3]; //discard low bit dataassign vga_out_g = video_g[7:2]; //discard low bit dataassign vga_out_b = video_b[7:3]; //discard low bit data//generate video pixel clockvideo_pll video_pll_m0( .inclk0(clk), .c0(video_clk));color_bar color_bar_m0( .clk(video_clk), .rst(~rst_n), .hs(video_hs), .vs(video_vs), .de(video_de), .rgb_r(video_r), .rgb_g(video_g), .rgb_b(video_b));endmodule
标签： fpga vga显示 verilog quartus
上传时间： 2021-12-19
上传用户：kingwide
高通蓝牙芯片QCC5051详细规格书共有117页，开发人员必备手册 支持蓝牙标准 5.2 ->Quad-core processor architecture ->High-performance programmable Bluetooth stereo audio Soc ->Low power modes to extend battery life. ->Flexible flash programmable platform. ->For wired/wirelss stereo heradsets/headphones application. ->For Qualcomm TrueWirless stereo earbuds application.主要特点如下
上传时间： 2022-01-24
上传用户：shjgzh
高通qualcommon蓝牙芯片QCC3056详细规格书共有112页，开发人员必备手册 支持蓝牙标准5.2 ->Quad-core processor architecture ->High-performance programmable Bluetooth mono audio Soc ->Low power modes to extend battery life. ->For Qualcomm TrueWirless stereo earbuds application.主要特点如下。
上传时间： 2022-01-24
上传用户：zhanglei193
STM32L053C8T6数据手册Features • Ultra-low-power platform – 1.65 V to 3.6 V power supply – -40 to 125 °C temperature range – 0.27 µA Standby mode (2 wakeup pins) – 0.4 µA Stop mode (16 wakeup lines) – 0.8 µA Stop mode + RTC + 8 KB RAM retention – 139 µA/MHz Run mode at 32 MHz – 3.5 µs wakeup time (from RAM) – 5 µs wakeup time (from Flash) • Core: ARM® 32-bit Cortex®-M0+ with MPU – From 32 kHz up to 32 MHz max. – 0.95 DMIPS/MHz • Reset and supply management – Ultra-safe, low-power BOR (brownout reset) with 5 selectable thresholds – Ultralow power POR/PDR – Programmable voltage detector (PVD) • Clock sources – 1 to 25 MHz crystal oscillator – 32 kHz oscillator for RTC with calibration – High speed internal 16 MHz factory-trimmed RC (+/- 1%) – Internal low-power 37 kHz RC – Internal multispeed low-power 65 kHz to 4.2 MHz RC – PLL for CPU clock • Pre-programmed bootloader – USART, SPI supported • Development support – Serial wire debug supported • Up to 51 fast I/Os (45 I/Os 5V tolerant) • Memories – Up to 64 KB Flash with ECC – 8KB RAM – 2 KB of data EEPROM with ECC – 20-byte backup register
标签： stm32l053c8t6
上传时间： 2022-02-06
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The SI2302 uses advanced trench technology to provide excellent RDS(ON), low gate charge andoperation with gate voltages as low as 2.5V. This device is suitable for use as a Battery protection orin other Switching application
标签： si2302
上传时间： 2022-02-11
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The PW5200A/ PW5200C is high efficiency synchronous, PWM step-up DC/DC converters optimizedto provide a high efficient solution to medium power systems. The devices work with a 1.4MHz fixedfrequency switching. These features minimize overall solution footprint by allowing the use of tiny,low profile inductors and ceramic capacitors. Automatic PWM/PFM mode switching at light loadsaves power and improves efficiency
标签： pw5200
上传时间： 2022-02-11
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The PW4554 is a cost-effective, fully integrated high input voltage single-cell Li-ion battery charger.The charger uses a CC/CV charge profile required by Li-ion battery. The charger accepts an inputvoltage up to 24V but is disabled when the input voltage exceeds the OVP threshold, typically 6.8V,to prevent excessive power dissipation. The 24V rating eliminates the over-voltage protection circuitrequired in a low input voltage charger
标签： pw4554
上传时间： 2022-02-11
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PW4203 is a 4.5-22V input, 2A multi-cell synchronous Buck Li-Ion battery charger, suitable forportable application. Select pin is convenient for multi-cell charging. 800 kHz synchronous buckregulator integrates of 22V rating FETs with ultra low on- resistance to achieve high efficiency andsimple circuit design.The PW4203 is available in an 8-pin SOP package, provides a very compact system solution andgood thermal conductance
标签： pw4203
上传时间： 2022-02-11
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