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In-<b>CIRCUIT</b>

  • CoolMOS导通电阻分析及与VDMOS的比较

    为了克服传统功率MOS 导通电阻与击穿电压之间的矛盾,提出了一种新的理想器件结构,称为超级结器件或Cool2MOS ,CoolMOS 由一系列的P 型和N 型半导体薄层交替排列组成。在截止态时,由于p 型和n 型层中的耗尽区电场产生相互补偿效应,使p 型和n 型层的掺杂浓度可以做的很高而不会引起器件击穿电压的下降。导通时,这种高浓度的掺杂使器件的导通电阻明显降低。由于CoolMOS 的这种独特器件结构,使它的电性能优于传统功率MOS。本文对CoolMOS 导通电阻与击穿电压关系的理论计算表明,对CoolMOS 横向器件: Ron ·A = C ·V 2B ,对纵向器件: Ron ·A = C ·V B ,与纵向DMOS 导通电阻与击穿电压之间Ron ·A = C ·V 2. 5B 的关系相比,CoolMOS 的导通电阻降低了约两个数量级。

    标签: CoolMOS VDMOS 导通电阻

    上传时间: 2013-10-21

    上传用户:1427796291

  • 双绞线和低通滤波器降低EMI_RFI

    Abstract: Alexander Graham Bell patented twisted pair wires in 1881. We still use them today because they work so well. In addition we have the advantage ofincredible computer power within our world. Circuit simulators and filter design programs are available for little or no cost. We combine the twisted pair and lowpassfilters to produce spectacular rejection of radio frequency interference (RFI) and electromagnetic interference (EMI). We also illustrate use of a precision resistorarray to produce a customizable differential amplifier. The precision resistors set the gain and common mode rejection ratios, while we choose the frequencyresponse.

    标签: EMI_RFI 双绞线 低通滤波器

    上传时间: 2014-11-26

    上传用户:Vici

  • 利用数字电位器调整并校准升压型DC-DC转换器

    The purpose of this application note is to show an example of how a digital potentiometer can be used in thefeedback loop of a step-up DC-DC converter to provide calibration and/or adjustment of the output voltage.The example circuit uses a MAX5025 step-up DC-DC converter (capable of generating up to 36V,120mWmax) in conjunction with a DS1845, 256 position, NV digital potentiometer. For this example, the desiredoutput voltage is 32V, which is generated from an input supply of 5V. The output voltage can be adjusted in35mV increments (near 32V) and span a range wide enough to account for resistance, potentiometer and DCDCconverter tolerances (27.6V to 36.7V).

    标签: DC-DC 数字电位器 升压型 校准

    上传时间: 2014-12-23

    上传用户:781354052

  • XAPP854-数字锁相环(DPLL)参考设计

    Many applications require a clock signal to be synchronous, phase-locked, or derived fromanother signal, such as a data signal or another clock. This type of clock circuit is important in

    标签: XAPP DPLL 854 数字锁相环

    上传时间: 2014-12-23

    上传用户:qq21508895

  • Stabilize Your Transimpedance Amplifier

      Abstract: Transimpedance amplifiers (TIAs) are widely used to translate the current output of sensors like photodiode-to-voltagesignals, since several circuits and instruments can only accept voltage input. An operational amplifier with a feedback resistor fromoutput to the inverting input is the most straightforward implementation of such a TIA. However, even this simple TIA circuit requirescareful trade-offs among noise gain, offset voltage, bandwidth, and stability. Clearly stability in a TIA is essential for good, reliableperformance. This application note explains the empirical calculations for assessing stability and then shows how to fine-tune theselection of the feedback phase-compensation capacitor.

    标签: Transimpedance Stabilize Amplifier Your

    上传时间: 2013-11-13

    上传用户:daoyue

  • 数字集成电路设计Digital Integrated Circuit Design

      This unique guide to designing digital VLSI circuits takes a top-down approach, reflecting the natureof the design process in industry. Starting with architecture design, the book explains the why andhow of digital design, using the physics that designers need to know, and no more.Covering system and component aspects, design verification, VHDL modelling, clocking, signalintegrity, layout, electricaloverstress, field-programmable logic, economic issues, and more, thescope of the book is singularly comprehensive.

    标签: Integrated Digital Circuit Design

    上传时间: 2013-11-04

    上传用户:life840315

  • 你的PLD是亚稳态吗

      This application note provides a detailed description of themetastable behavior in PLDs from both circuit and statisticalviewpoints. Additionally, the information on the metastablecharacteristics of Cypress PLDs presented here can help youachieve any desired degree of reliability.

    标签: PLD 亚稳态

    上传时间: 2013-10-23

    上传用户:gtzj

  • 定点乘法器设计(中文)

       定点乘法器设计(中文)  运算符:   + 对其两边的数据作加法操作; A + B   - 从左边的数据中减去右边的数据; A - B   - 对跟在其后的数据作取补操作,即用0减去跟在其后的数据; - B   * 对其两边的数据作乘法操作; A * B   & 对其两边的数据按位作与操作; A & B   # 对其两边的数据按位作或操作; A # B   @ 对其两边的数据按位作异或操作; A @ B   ~ 对跟在其后的数据作按位取反操作; ~ B   << 以右边的数据为移位量将左边的数据左移; A << B   $ 将其两边的数据按从左至右顺序拼接; A $ B

    标签: 定点 乘法器设计

    上传时间: 2013-12-17

    上传用户:trepb001

  • IC封装热计算研究

    Many thermal metrics exist for integrated circuit (IC) packages ranging from θja to Ψjt.Often, these thermal metrics are misapplied by customers who try to use them to estimate junction temperatures in their systems.

    标签: IC封装 计算

    上传时间: 2013-10-18

    上传用户:猫爱薛定谔

  • RF至数字接收器的信号链噪声分析

      Designers of signal receiver systems often need to performcascaded chain analysis of system performancefrom the antenna all the way to the ADC. Noise is a criticalparameter in the chain analysis because it limits theoverall sensitivity of the receiver. An application’s noiserequirement has a signifi cant infl uence on the systemtopology, since the choice of topology strives to optimizethe overall signal-to-noise ratio, dynamic range andseveral other parameters. One problem in noise calculationsis translating between the various units used by thecomponents in the chain: namely the RF, IF/baseband,and digital (ADC) sections of the circuit.

    标签: 数字接收器 信号链 噪声分析

    上传时间: 2014-12-05

    上传用户:cylnpy