代码搜索:testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
www.eeworm.com/read/317998/3573280
txt syn_tran_tb_settings.txt
[SETTINGS]
UUT_module%syn_tran%
TB_module%syn_tran_tb%
DSN_PATH%$DSN\src\TestBench%
OUTPUT_DIRECTORY%d:\yhy\syn_tran\syn_tran\src\TestBench%
STIMULUS%NO%
VECTORS_FILE%%
AWF_FILE%%
TB_FILE%syn_
www.eeworm.com/read/350770/10711811
v ping_tb.v
/***********************************************************************
File: ping_tb.v
Rev: 3.0.0
This is an example top-level verilog testbench for the Ping user
design. It instant
www.eeworm.com/read/478695/6713155
v receive_tb.v
/*-------------------------------------------------------------------------------
-- $Revision: 1.5 $ $Date: 2008-04-10 00:44:36 $
-- Title : Demo testbench
-- Project : 10 Gigabit Ethernet MA
www.eeworm.com/read/233765/14137151
m nco_v7_1_tb.m
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Altera NCO Compiler version 6.1
% file : nco_v7_1_tb.m
%
% Description : The following Matlab testbench e
www.eeworm.com/read/10793/190768
_info
m255
13
cModel Technology
dF:\EdaOk\project\PeriphDIY\uart\fpga\V0p00\testbench
www.eeworm.com/read/17491/732658
_info
m255
13
cModel Technology
dF:\EdaOk\project\PeriphDIY\uart\fpga\V0p00\testbench
www.eeworm.com/read/18981/806642
vhdtst test_bcd8.vhdtst
------------------------------------------------------------
-- VHDL Testbench for BCD8
-- 2003 6 5 1 19 17
-- Created by "EditVHDL"
-- "Copyright (c) 2002 Altium Limited"
-----------------------
www.eeworm.com/read/18981/806675
vhdtst test_disp123456.vhdtst
------------------------------------------------------------
-- VHDL Testbench for DISP123456
-- 2003 5 29 10 49 10
-- Created by "EditVHDL"
-- "Copyright (c) 2002 Altium Limited"
---------------
www.eeworm.com/read/492323/1176262
_info
m255
13
cModel Technology
dF:\EdaOk\project\PeriphDIY\uart\fpga\V0p00\testbench
www.eeworm.com/read/474259/1394872
v tb_infifo_rev0.2.v
////////////////////////////////////////////////////
//
// Module Name: tb_infifo
// Description: Testbench for input fifo.
// Author: James Rosenthal
// Date: 10/28/04
//
//
// Notes:
/