代码搜索:std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
www.eeworm.com/read/169299/9868596
vhf top.vhf
--------------------------------------------------------------------------------
-- Copyright (c) 1995-2003 Xilinx, Inc.
-- All Right Reserved.
-----------------------------------------------------
www.eeworm.com/read/169299/9868678
vhd dq24.vhd
--------------------------------------------------------------------------------
-- Copyright (c) 1995-2003 Xilinx, Inc.
-- All Right Reserved.
-----------------------------------------------------
www.eeworm.com/read/169299/9869057
vhdl count4.vhdl
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for ins
www.eeworm.com/read/364631/9902790
vhd lcd.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity lcd is
Port ( clk : in std_logic; --4MHZ FROM D12
Reset
www.eeworm.com/read/364169/9919455
vhd frequency.vhd
LIBRARY IEEE;
USE IEEE.Std_Logic_1164.ALL;
ENTITY Frequency IS
PORT ( Clk10Hz: in Std_logic ;
Clk1Hz: out Std_logic);
END ;
ARCHITECTURE behavior OF Frequency IS
BEGIN
www.eeworm.com/read/168320/9920112
vhd complementor.vhd
library ieee;
use ieee.std_logic_1164.all;
entity Complementor is
port(num: in std_logic_vector(3 downto 0);
numout: out std_logic_vector(3 downto 0));
end entity;
architecture Impl of
www.eeworm.com/read/168079/9940174
vhd result.vhd
-- output of CoreGen module generator
-- $Header: romrVHT.vhd,v 1.3 1998/06/15 16:22:02 tonyw Exp $
-- *****************************************************************
-- Copyright 1997-1998 - Xi
www.eeworm.com/read/168079/9940178
vhd radd16.vhd
-- output of CoreGen module generator
-- $Header: adreVHT.vhd,v 1.3 1998/06/15 17:52:34 tonyw Exp $
-- ************************************************************************
-- Copyright 1996-19
www.eeworm.com/read/168079/9940197
vhd mux4w8.vhd
-- output of CoreGen module generator
-- $Header: mux4VHT.vhd,v 1.2 1998/06/15 17:58:03 tonyw Exp $
-- ************************************************************************
-- Copyright 1996-19
www.eeworm.com/read/168079/9940230
vhd rsub16.vhd
-- output of CoreGen module generator
-- $Header: subreVHT.vhd,v 1.3 1998/06/15 17:53:11 tonyw Exp $
-- ************************************************************************
-- Copyright 1996-1