代码搜索:modelsim_ae

找到约 18 项符合「modelsim_ae」的源代码

代码结果 18
www.eeworm.com/read/469279/6979975

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# Reading E:/altera/72/modelsim_ae/tcl/vsim/pref.tcl # OpenFile "C:/Documents and Settings/chengle/Lb/QuartusII/VHDL/VHDL/my_eda(10)/m/m.vhd"
www.eeworm.com/read/492763/6408721

mti uart.cr.mti

D:/altera/90/modelsim_ae/examples/verilog/pli/fibonacci/fibonacci.v {0 {vlog -work work -nocovercells D:/altera/90/modelsim_ae/examples/verilog/pli/fibonacci/fibonacci.v Model Technology ModelSim ALT
www.eeworm.com/read/320897/13416766

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# Reading C:/altera/72/modelsim_ae/tcl/vsim/pref.tcl # OpenFile "D:/kevinquartusII/111/AP600.v"
www.eeworm.com/read/212701/15151026

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# Reading D:/Modeltech/ModelSim_AE_5_5e/win32aloem/../tcl/vsim/pref.tcl # OpenFile D:/DATA/HS/AN215_Design_Examples/final/magnitude/magnitude.v
www.eeworm.com/read/384493/2598991

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# Reading D:/altera/72/modelsim_ae/tcl/vsim/pref.tcl # OpenFile "D:/penshe/spi/modelsim/work/@s@p@i_master_test/verilog.psm"
www.eeworm.com/read/9549/170093

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# Reading D:/Program Files/altera/81/modelsim_ae/tcl/vsim/pref.tcl # OpenFile {C:/Users/Administrator/Desktop/Pipelined CPU(2rd time)/instruction_decode.v}
www.eeworm.com/read/468520/6992222

mpf siva.mpf

[Library] others = C:\altera\81\modelsim_ae\win32aloem/../modelsim.ini ; Altera specific primitive library mappings work = work [vcom] ; Turn on VHDL-1993 as the default. Normally is off.
www.eeworm.com/read/337198/12384294

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# do sim.do # ** Warning: (vlib-34) Library already exists at "work". # Modifying C:\altera\72\modelsim_ae\win32aloem/../modelsim.ini # Model Technology ModelSim ALTERA vlog 6.1g Compiler 2006.08
www.eeworm.com/read/320300/13428720

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# Reading C:/altera/72_cc/modelsim_ae/tcl/vsim/pref.tcl # OpenFile "D:/Altera/MAXIIZ update/Design example/AN500/modelsim/nand_interface.mpf" # Loading project nand_interface vsim -gui work.nand
www.eeworm.com/read/492763/6408714

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# Reading D:/altera/90/modelsim_ae/tcl/vsim/pref.tcl # OpenFile {F:/My Project/Verilog HDL/UART/uart_txd/uart.mpf} # Loading project uart vsim -voptargs=+acc work.uart_txd_vlg_check_tst # vsim