代码搜索：dataIn
找到约 2,888 项符合「dataIn」的源代码
代码结果 2,888
www.eeworm.com/read/205721/15309113
m rot3c_eig.m
function [dataout]=rot3c_eig(datain,headw1,tint,comp1,comp2)
%rot3c_eig -> function to rotate components of 3-C borehole data (DSI etc.)
%into radial and transverse components using matrix eigenvalu
www.eeworm.com/read/419416/10869964
vhd data_unite.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for ins
www.eeworm.com/read/465363/7053831
v my_dqs.v
// megafunction wizard: %ALTDQS%CBX%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: altdqs
// ============================================================
// File Name: MY_DQS.v
// Mega
www.eeworm.com/read/462942/7191308
v my_dqs.v
// megafunction wizard: %ALTDQS%CBX%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: altdqs
// ============================================================
// File Name: MY_DQS.v
// Mega
www.eeworm.com/read/320897/13416767
pin pcpu.pin
-- Copyright (C) 1991-2007 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and a
www.eeworm.com/read/404468/11484880
hier_info 1.hier_info
|ram_32
a[0] => ram_initial.waddr[0].DATAIN
a[0] => ram_initial.WADDR
a[0] => ram_initial.RADDR
a[1] => ram_initial.waddr[1].DATAIN
a[1] => ram_initial.WADDR1
a[1] => ram_initial.RADDR1
a[2] =>
www.eeworm.com/read/343298/11959575
m con_oct_bin.m
function [out1,out2]=con_oct_bin(datain);
datain1=datain.x;
temp=double(datain1(233:249));%转换为UNIT16类型
for i=1:17
len=8-length(double(dec2bin(temp(i)))-48);
data((i-1)*8+1:(i-1)*8+8)=[zer
www.eeworm.com/read/300031/13943210
v my_dqs.v
// megafunction wizard: %ALTDQS%CBX%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: altdqs
// ============================================================
// File Name: MY_DQS.v
// Mega
www.eeworm.com/read/453687/7414503
hier_info sample.hier_info
|sample
clk => current_state~5.IN1
enable => current_state~0.OUTPUTSELECT
enable => current_state~1.OUTPUTSELECT
enable => current_state~2.OUTPUTSELECT
enable => current_state~3.OUTPUTSELECT
ena
www.eeworm.com/read/309317/13674274
hier_info sample.hier_info
|sample
clk => current_state~5.IN1
enable => current_state~0.OUTPUTSELECT
enable => current_state~1.OUTPUTSELECT
enable => current_state~2.OUTPUTSELECT
enable => current_state~3.OUTPUTSELECT
ena