m_00000000003961273401_2750005021.c

用verilog HDL编写的并串转换模块

/**********************************************************************/
/*   ____  ____                                                       */
/*  /   /\/   /                                                       */
/* /___/  \  /                                                        */
/* \   \   \/                                                         */
/*  \   \        Copyright (c) 2003-2007 Xilinx, Inc.                 */
/*  /   /        All Right Reserved.                                  */
/* /---/   /\                                                         */
/* \   \  /  \                                                        */
/*  \___\/\___\                                                       */
/**********************************************************************/

/* This file is designed for use with ISim build 0x734844ce */

#include "xsi.h"
#include <memory.h>
#ifdef __GNUC__
#include <stdlib.h>
#else
#include <malloc.h>
#define alloca _alloca
#endif
static const char *ng0 = "E:/01. ISE9.1/apgy2/chuan2/converter.v";
static int ng1[] = {1, 0};
static int ng2[] = {2, 0};
static int ng3[] = {0, 0};



static void I27_0(char *t0)
{
    char *t1;
    char *t2;

LAB0:    xsi_set_current_line(28, ng0);

LAB2:    xsi_set_current_line(29, ng0);
    t1 = ((char*)((ng1)));
    t2 = (t0 + 1148);
    xsi_vlogvar_assign_value(t2, t1, 0, 0, 32);

LAB1:    return;
}

static void A31_1(char *t0)
{
    char t7[8];
    char t9[8];
    char *t1;
    char *t2;
    char *t3;
    char *t4;
    char *t5;
    char *t6;
    char *t8;
    char *t10;
    unsigned int t11;
    unsigned int t12;
    unsigned int t13;
    unsigned int t14;
    unsigned int t15;
    char *t16;
    char *t17;

LAB0:    t1 = (t0 + 1752U);
    t2 = *((char **)t1);
    if (t2 == 0)
        goto LAB2;

LAB3:    goto *t2;

LAB2:    xsi_set_current_line(31, ng0);
    t2 = (t0 + 1932);
    *((int *)t2) = 1;
    *((char **)t1) = &&LAB4;

LAB1:    return;
LAB4:    xsi_set_current_line(32, ng0);

LAB5:    xsi_set_current_line(33, ng0);
    t3 = (t0 + 1148);
    t4 = (t3 + 32U);
    t5 = *((char **)t4);
    t6 = ((char*)((ng2)));
    memset(t7, 0, 8);
    xsi_vlog_signed_mod(t7, 32, t5, 32, t6, 32);
    t8 = ((char*)((ng3)));
    memset(t9, 0, 8);
    xsi_vlog_signed_not_equal(t9, 32, t7, 32, t8, 32);
    t10 = (t9 + 4U);
    t11 = *((unsigned int *)t10);
    t12 = (~(t11));
    t13 = *((unsigned int *)t9);
    t14 = (t13 & t12);
    t15 = (t14 != 0);
    if (t15 > 0)
        goto LAB6;

LAB7:    xsi_set_current_line(36, ng0);
    t2 = (t0 + 740U);
    t3 = *((char **)t2);
    t2 = (t0 + 1056);
    xsi_vlogvar_generic_wait_assign_value(t2, t3, 2, 0, 0, 1, 0LL);

LAB8:    xsi_set_current_line(37, ng0);
    t2 = (t0 + 1148);
    t3 = (t2 + 32U);
    t4 = *((char **)t3);
    t5 = ((char*)((ng1)));
    memset(t7, 0, 8);
    xsi_vlog_signed_add(t7, 32, t4, 32, t5, 32);
    t6 = (t0 + 1148);
    xsi_vlogvar_assign_value(t6, t7, 0, 0, 32);
    goto LAB2;

LAB6:    xsi_set_current_line(34, ng0);
    t16 = (t0 + 740U);
    t17 = *((char **)t16);
    t16 = (t0 + 964);
    xsi_vlogvar_generic_wait_assign_value(t16, t17, 2, 0, 0, 1, 0LL);
    goto LAB8;

}


extern void work_m_00000000003961273401_2750005021_init()
{
	static char *pe[] = {(void *)I27_0,(void *)A31_1};
	xsi_register_didat("work_m_00000000003961273401_2750005021", "isim/_tmp/work/m_00000000003961273401_2750005021.didat");
	xsi_register_executes(pe);
}