fcout.tan.qmsg

数字频率计 FPGA 用verilog语言编写

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{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Apr 05 22:27:52 2007 " "Info: Processing started: Thu Apr 05 22:27:52 2007" {  } {  } 0}  } {  } 4}