fcout.qsf

数字频率计 FPGA 用verilog语言编写

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		fcout_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 5.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:39:37  MARCH 31, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 5.0
set_global_assignment -name VERILOG_FILE Half_freq.v
set_global_assignment -name VERILOG_FILE ten_divider.v
set_global_assignment -name VERILOG_FILE counter_24b.v
set_global_assignment -name VERILOG_FILE div3.v
set_global_assignment -name VERILOG_FILE display.v
set_global_assignment -name VERILOG_FILE mode.v
set_global_assignment -name BDF_FILE dividers.bdf
set_global_assignment -name BDF_FILE fcout.bdf
set_global_assignment -name VECTOR_WAVEFORM_FILE fcout.vwf

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_59 -to disp[23]
set_location_assignment PIN_58 -to disp[22]
set_location_assignment PIN_54 -to disp[21]
set_location_assignment PIN_53 -to disp[20]
set_location_assignment PIN_52 -to disp[19]
set_location_assignment PIN_51 -to disp[18]
set_location_assignment PIN_50 -to disp[17]
set_location_assignment PIN_49 -to disp[16]
set_location_assignment PIN_48 -to disp[15]
set_location_assignment PIN_47 -to disp[14]
set_location_assignment PIN_39 -to disp[13]
set_location_assignment PIN_38 -to disp[12]
set_location_assignment PIN_37 -to disp[11]
set_location_assignment PIN_36 -to disp[10]
set_location_assignment PIN_35 -to disp[9]
set_location_assignment PIN_30 -to disp[8]
set_location_assignment PIN_29 -to disp[7]
set_location_assignment PIN_28 -to disp[6]
set_location_assignment PIN_27 -to disp[5]
set_location_assignment PIN_25 -to disp[4]
set_location_assignment PIN_24 -to disp[3]
set_location_assignment PIN_23 -to disp[2]
set_location_assignment PIN_22 -to disp[1]
set_location_assignment PIN_21 -to disp[0]
set_location_assignment PIN_3 -to clk_12m
set_location_assignment PIN_5 -to clock_x
set_location_assignment PIN_10 -to mode_sel
set_location_assignment PIN_9 -to Reset
set_location_assignment PIN_11 -to rang_sel

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY FLEX10K
set_global_assignment -name TOP_LEVEL_ENTITY fcout

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE "EPF10K10LC84-4"
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1