assert_change.vlib

来自「OVL——基于断言的verilog验证 Verilog数字系统设计:RTL综合」· VLIB 代码 · 共 28 行

VLIB
28
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// Accellera Standard V1.0 Open Verification Library (OVL).
// Accellera Copyright (c) 2005. All rights reserved.

`include "std_ovl_defines.h"

`module assert_change (clk, reset_n, start_event, test_expr);
  parameter severity_level=`OVL_ERROR;
  parameter width=1;
  parameter num_cks=1;
  parameter action_on_new_start=`OVL_IGNORE_NEW_START;
  parameter property_type = `OVL_ASSERT;
  parameter msg="VIOLATION";
  parameter coverage_level = `OVL_COVER_ALL;
  input clk;
  input reset_n;
  input start_event;
  input [width-1:0] test_expr;

`ifdef OVL_VERILOG
  `include "./vlog95/assert_change_logic.v"
`endif // OVL_VERILOG

`ifdef OVL_SVA
  `include "./sva31a/assert_change_logic.sv"
`endif // OVL_SVA

`endmodule

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