assert_fifo_index.vlib

来自「OVL——基于断言的verilog验证 Verilog数字系统设计:RTL综合」· VLIB 代码 · 共 28 行

// Accellera Standard V1.0 Open Verification Library (OVL).
// Accellera Copyright (c) 2005. All rights reserved.

`include "std_ovl_defines.h"

`module assert_fifo_index (clk, reset_n, push, pop);
  parameter severity_level = `OVL_ERROR;
  parameter depth=1;
  parameter push_width = 1;
  parameter pop_width = 1;
  parameter property_type=`OVL_ASSERT;
  parameter msg="VIOLATION";
  parameter coverage_level = `OVL_COVER_ALL;
  parameter simultaneous_push_pop = 1;
  input clk, reset_n;
  input [push_width-1:0] push;
  input [pop_width-1:0] pop;

`ifdef OVL_VERILOG
  `include "./vlog95/assert_fifo_index_logic.v"
`endif // OVL_VERILOG

`ifdef OVL_SVA
  `include "./sva31a/assert_fifo_index_logic.sv"
`endif // OVL_SVA

`endmodule