assert_next.vlib

来自「OVL——基于断言的verilog验证 Verilog数字系统设计:RTL综合」· VLIB 代码 · 共 26 行

// Accellera Standard V1.0 Open Verification Library (OVL).
// Accellera Copyright (c) 2005. All rights reserved.

`include "std_ovl_defines.h"

`module assert_next (clk, reset_n, start_event, test_expr);
  parameter severity_level = `OVL_ERROR;
  parameter num_cks=1;
  parameter check_overlapping=1;
  parameter check_missing_start=0; // if 1, test_expr can only appear if a
                                   // corresponding start_event occurs
  parameter property_type = `OVL_ASSERT;
  parameter msg="VIOLATION";
  parameter coverage_level = `OVL_COVER_ALL;
  input clk, reset_n, start_event, test_expr;

`ifdef OVL_VERILOG
  `include "./vlog95/assert_next_logic.v"
`endif // OVL_VERILOG

`ifdef OVL_SVA
  `include "./sva31a/assert_next_logic.sv"
`endif // OVL_SVA

`endmodule