dividend4.tan.summary

本设计是一个八位被除数除以四位除数

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 3.400 ns
From           : st
To             : state_graph:u5|state[0]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 9.700 ns
From           : quotient[0]~en
To             : quotient[1]
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 5.300 ns
From           : divisor[3]
To             : sub_5:u3|differin[3]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 39.06 MHz ( period = 25.600 ns )
From           : sub_5:u3|differin[3]
To             : remainder[3]~reg0
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Clock Hold: 'clk'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : state_graph:u5|load
To             : shift:u4|shiftin[8]
From Clock     : clk
To Clock       : clk
Failed Paths   : 8

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 8

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