prev_cmp_dds_new.map.qmsg

来自「驱动时钟加入了PLL,使得DDS的驱动时钟可变.32位的NCO使得DDS的分辨率」· QMSG 代码 · 共 38 行 · 第 1/2 页

{ "Warning" "WSGN_SEARCH_FILE" "pll4.v 1 1 " "Warning: Using design file pll4.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 pll4 " "Info: Found entity 1: pll4" {  } { { "pll4.v" "" { Text "D:/Project/dds_new/pll4.v" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "pll4 pll4:inst4 " "Info: Elaborating entity \"pll4\" for hierarchy \"pll4:inst4\"" {  } { { "dds_new.bdf" "inst4" { Schematic "D:/Project/dds_new/dds_new.bdf" { { 320 -184 56 480 "inst4" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/altpll.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/altpll.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altpll " "Info: Found entity 1: altpll" {  } { { "altpll.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/altpll.tdf" 476 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altpll pll4:inst4\|altpll:altpll_component " "Info: Elaborating entity \"altpll\" for hierarchy \"pll4:inst4\|altpll:altpll_component\"" {  } { { "pll4.v" "altpll_component" { Text "D:/Project/dds_new/pll4.v" 88 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "pll4:inst4\|altpll:altpll_component " "Info: Elaborated megafunction instantiation \"pll4:inst4\|altpll:altpll_component\"" {  } { { "pll4.v" "" { Text "D:/Project/dds_new/pll4.v" 88 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "sinrom.v 1 1 " "Warning: Using design file sinrom.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 sinrom " "Info: Found entity 1: sinrom" {  } { { "sinrom.v" "" { Text "D:/Project/dds_new/sinrom.v" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sinrom sinrom:inst3 " "Info: Elaborating entity \"sinrom\" for hierarchy \"sinrom:inst3\"" {  } { { "dds_new.bdf" "inst3" { Schematic "D:/Project/dds_new/dds_new.bdf" { { 272 256 472 408 "inst3" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" 435 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram sinrom:inst3\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"sinrom:inst3\|altsyncram:altsyncram_component\"" {  } { { "sinrom.v" "altsyncram_component" { Text "D:/Project/dds_new/sinrom.v" 74 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "sinrom:inst3\|altsyncram:altsyncram_component " "Info: Elaborated megafunction instantiation \"sinrom:inst3\|altsyncram:altsyncram_component\"" {  } { { "sinrom.v" "" { Text "D:/Project/dds_new/sinrom.v" 74 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_5071.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_5071.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_5071 " "Info: Found entity 1: altsyncram_5071" {  } { { "db/altsyncram_5071.tdf" "" { Text "D:/Project/dds_new/db/altsyncram_5071.tdf" 31 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_5071 sinrom:inst3\|altsyncram:altsyncram_component\|altsyncram_5071:auto_generated " "Info: Elaborating entity \"altsyncram_5071\" for hierarchy \"sinrom:inst3\|altsyncram:altsyncram_component\|altsyncram_5071:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" 918 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_4oa.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/decode_4oa.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_4oa " "Info: Found entity 1: decode_4oa" {  } { { "db/decode_4oa.tdf" "" { Text "D:/Project/dds_new/db/decode_4oa.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "decode_4oa sinrom:inst3\|altsyncram:altsyncram_component\|altsyncram_5071:auto_generated\|decode_4oa:deep_decode " "Info: Elaborating entity \"decode_4oa\" for hierarchy \"sinrom:inst3\|altsyncram:altsyncram_component\|altsyncram_5071:auto_generated\|decode_4oa:deep_decode\"" {  } { { "db/altsyncram_5071.tdf" "deep_decode" { Text "D:/Project/dds_new/db/altsyncram_5071.tdf" 40 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_vjb.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_vjb.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_vjb " "Info: Found entity 1: mux_vjb" {  } { { "db/mux_vjb.tdf" "" { Text "D:/Project/dds_new/db/mux_vjb.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mux_vjb sinrom:inst3\|altsyncram:altsyncram_component\|altsyncram_5071:auto_generated\|mux_vjb:mux2 " "Info: Elaborating entity \"mux_vjb\" for hierarchy \"sinrom:inst3\|altsyncram:altsyncram_component\|altsyncram_5071:auto_generated\|mux_vjb:mux2\"" {  } { { "db/altsyncram_5071.tdf" "mux2" { Text "D:/Project/dds_new/db/altsyncram_5071.tdf" 41 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "255 " "Info: Implemented 255 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "66 " "Info: Implemented 66 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "44 " "Info: Implemented 44 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "96 " "Info: Implemented 96 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0} { "Info" "ICUT_CUT_TM_RAMS" "48 " "Info: Implemented 48 RAM segments" {  } {  } 0 0 "Implemented %1!d! RAM segments" 0 0 "" 0} { "Info" "ICUT_CUT_TM_PLLS" "1 " "Info: Implemented 1 ClockLock PLLs" {  } {  } 0 0 "Implemented %1!d! ClockLock PLLs" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 4 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "148 " "Info: Allocated 148 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Fri Mar 21 15:20:17 2008 " "Info: Processing ended: Fri Mar 21 15:20:17 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Info: Elapsed time: 00:00:06" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}