dds_new.tan.summary

来自「驱动时钟加入了PLL,使得DDS的驱动时钟可变.32位的NCO使得DDS的分辨率」· SUMMARY 代码 · 共 77 行

--------------------------------------------------------------------------------------
Timing Analyzer Summary
--------------------------------------------------------------------------------------

Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 12.826 ns
From           : phase[7]
To             : sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a6~porta_address_reg11
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 9.452 ns
From           : acc:inst|lpm_add_sub:lpm_add_sub_component|add_sub_q4h:auto_generated|pipeline_dffe[0]
To             : A[29]
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 14.841 ns
From           : phase[7]
To             : A[29]
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -3.554 ns
From           : phase[20]
To             : sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a17~porta_address_reg2
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'pll4:inst4|altpll:altpll_component|_clk0'
Slack          : 0.896 ns
Required Time  : 120.00 MHz ( period = 8.333 ns )
Actual Time    : 134.46 MHz ( period = 7.437 ns )
From           : acc:inst|lpm_add_sub:lpm_add_sub_component|add_sub_q4h:auto_generated|pipeline_dffe[0]
To             : sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a6~porta_address_reg11
From Clock     : pll4:inst4|altpll:altpll_component|_clk0
To Clock       : pll4:inst4|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Hold: 'pll4:inst4|altpll:altpll_component|_clk0'
Slack          : 0.795 ns
Required Time  : 120.00 MHz ( period = 8.333 ns )
Actual Time    : N/A
From           : acc:inst|lpm_add_sub:lpm_add_sub_component|add_sub_q4h:auto_generated|pipeline_dffe[16]
To             : acc:inst|lpm_add_sub:lpm_add_sub_component|add_sub_q4h:auto_generated|pipeline_dffe[16]
From Clock     : pll4:inst4|altpll:altpll_component|_clk0
To Clock       : pll4:inst4|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

--------------------------------------------------------------------------------------