dds_new.fit.summary

驱动时钟加入了PLL,使得DDS的驱动时钟可变.32位的NCO使得DDS的分辨率可以做到Hz量级

Fitter Status : Successful - Fri Nov 28 14:50:25 2008
Quartus II Version : 7.2 Build 151 09/26/2007 SJ Full Version
Revision Name : dds_new
Top-level Entity Name : dds_new
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Final
Total logic elements : 92 / 33,216 ( < 1 % )
    Total combinational functions : 92 / 33,216 ( < 1 % )
    Dedicated logic registers : 36 / 33,216 ( < 1 % )
Total registers : 36
Total pins : 110 / 475 ( 23 % )
Total virtual pins : 0
Total memory bits : 196,608 / 483,840 ( 41 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 1 / 4 ( 25 % )