lcdcont.map.eqn

用vhdl语言实现2DPSK数字传输

B1_\count:counter[5]_lut_out = B1L53 & !B1L05;
B1_\count:counter[5] = DFFEAS(B1_\count:counter[5]_lut_out, clk, VCC, , , , , , );


--B1_\count:counter[3] is clockdiv:div|\count:counter[3]
--operation mode is normal

B1_\count:counter[3]_lut_out = B1L73 & !B1L05;
B1_\count:counter[3] = DFFEAS(B1_\count:counter[3]_lut_out, clk, VCC, , , , , , );


--B1L84 is clockdiv:div|reduce_nor~101
--operation mode is normal

B1L84 = B1_\count:counter[6] # B1_\count:counter[4] # !B1_\count:counter[3] # !B1_\count:counter[5];


--B1_\count:counter[2] is clockdiv:div|\count:counter[2]
--operation mode is normal

B1_\count:counter[2]_lut_out = B1L93;
B1_\count:counter[2] = DFFEAS(B1_\count:counter[2]_lut_out, clk, VCC, , , , , , );


--B1_\count:counter[0] is clockdiv:div|\count:counter[0]
--operation mode is normal

B1_\count:counter[0]_lut_out = B1L14 & !B1L05;
B1_\count:counter[0] = DFFEAS(B1_\count:counter[0]_lut_out, clk, VCC, , , , , , );


--B1_\count:counter[1] is clockdiv:div|\count:counter[1]
--operation mode is normal

B1_\count:counter[1]_lut_out = B1L34 & !B1L05;
B1_\count:counter[1] = DFFEAS(B1_\count:counter[1]_lut_out, clk, VCC, , , , , , );


--B1L94 is clockdiv:div|reduce_nor~102
--operation mode is normal

B1L94 = B1_\count:counter[2] # B1_\count:counter[0] # !B1_\count:counter[1];


--B1L05 is clockdiv:div|reduce_nor~103
--operation mode is normal

B1L05 = !B1L64 & !B1L74 & !B1L84 & !B1L94;


--D1L04 is lcd:mylcd|reduce_nor~57
--operation mode is normal

D1L04 = D1_count[0] & D1_count[2] & (!D1_count[4]);


--D1L14 is lcd:mylcd|reduce_nor~58
--operation mode is normal

D1L14 = !D1_count[1] & !D1_count[3];


--D1L6 is lcd:mylcd|count[1]~567
--operation mode is normal

D1L6 = !D1_state.setmode & !D1_state.dispoff;


--D1L24 is lcd:mylcd|reduce_nor~59
--operation mode is normal

D1L24 = D1_count[0] & D1_count[1] & D1_count[2] & !D1_count[4];


--D1_state.warmup is lcd:mylcd|state.warmup
--operation mode is normal

D1_state.warmup_lut_out = VCC;
D1_state.warmup = DFFEAS(D1_state.warmup_lut_out, B1_clockout, reset, , D1L83, , , , );


--D1L7 is lcd:mylcd|count[1]~568
--operation mode is normal

D1L7 = D1_state.warmup & D1_state.code_address2 & (!D1L24 # !D1_count[3]) # !D1_state.warmup & (D1_count[3] # !D1L24);


--D1L8 is lcd:mylcd|count[1]~569
--operation mode is normal

D1L8 = D1_state.warmup & (!D1_state.code_address2);


--D1L34 is lcd:mylcd|reduce_nor~60
--operation mode is normal

D1L34 = D1_count[2] & (!D1_count[4]);


--D1L66 is lcd:mylcd|state~71
--operation mode is normal

D1L66 = D1_state.home & D1L34 & D1L14 & !D1_count[0];


--D1L9 is lcd:mylcd|count[1]~570
--operation mode is normal

D1L9 = !D1L7 & (D1L66 # !D1L8) # !D1L6;


--D1L01 is lcd:mylcd|count[1]~571
--operation mode is normal

D1L01 = D1_count[3] & D1_state.setfunc & D1L24;


--D1L11 is lcd:mylcd|count[1]~572
--operation mode is normal

D1L11 = D1_state.write # D1_state.position;


--D1L21 is lcd:mylcd|count[1]~573
--operation mode is normal

D1L21 = D1_count[0] & D1_state.clear & D1L34 & D1L14;


--D1L31 is lcd:mylcd|count[1]~574
--operation mode is normal

D1L31 = !D1L01 & !D1L11 & !D1L21 & D1L15;


--C1_ql[0] is cir_shifter:mycir_shift|ql[0]
--operation mode is normal

C1_ql[0]_lut_out = lock & C1_ql[1] # !lock & (E2_qout[0]);
C1_ql[0] = DFFEAS(C1_ql[0]_lut_out, B1_clockout, VCC, , , , , , );


--C1_qh[1] is cir_shifter:mycir_shift|qh[1]
--operation mode is normal

C1_qh[1]_lut_out = lock & C1_qh[2] # !lock & (E1_qout[1]);
C1_qh[1] = DFFEAS(C1_qh[1]_lut_out, B1_clockout, VCC, , , , , , );


--D1L93 is lcd:mylcd|reduce_nor~3
--operation mode is normal

D1L93 = D1_count[2] & D1L14 & !D1_count[0] & !D1_count[4];


--B1L61 is clockdiv:div|add~226
--operation mode is arithmetic

B1L61_carry_eqn = B1L22;
B1L61 = B1_\count:counter[12] $ (!B1L61_carry_eqn);

--B1L71 is clockdiv:div|add~228
--operation mode is arithmetic

B1L71 = CARRY(B1_\count:counter[12] & (!B1L22));


--B1L81 is clockdiv:div|add~231
--operation mode is normal

B1L81_carry_eqn = B1L02;
B1L81 = B1_\count:counter[14] $ (!B1L81_carry_eqn);


--B1L91 is clockdiv:div|add~236
--operation mode is arithmetic

B1L91_carry_eqn = B1L71;
B1L91 = B1_\count:counter[13] $ (B1L91_carry_eqn);

--B1L02 is clockdiv:div|add~238
--operation mode is arithmetic

B1L02 = CARRY(!B1L71 # !B1_\count:counter[13]);


--B1L12 is clockdiv:div|add~241
--operation mode is arithmetic

B1L12_carry_eqn = B1L42;
B1L12 = B1_\count:counter[11] $ (B1L12_carry_eqn);

--B1L22 is clockdiv:div|add~243
--operation mode is arithmetic

B1L22 = CARRY(!B1L42 # !B1_\count:counter[11]);


--B1L32 is clockdiv:div|add~246
--operation mode is arithmetic

B1L32_carry_eqn = B1L62;
B1L32 = B1_\count:counter[10] $ (!B1L32_carry_eqn);

--B1L42 is clockdiv:div|add~248
--operation mode is arithmetic

B1L42 = CARRY(B1_\count:counter[10] & (!B1L62));


--B1L52 is clockdiv:div|add~251
--operation mode is arithmetic

B1L52_carry_eqn = B1L82;
B1L52 = B1_\count:counter[9] $ (B1L52_carry_eqn);

--B1L62 is clockdiv:div|add~253
--operation mode is arithmetic

B1L62 = CARRY(!B1L82 # !B1_\count:counter[9]);


--B1L72 is clockdiv:div|add~256
--operation mode is arithmetic

B1L72_carry_eqn = B1L03;
B1L72 = B1_\count:counter[8] $ (!B1L72_carry_eqn);

--B1L82 is clockdiv:div|add~258
--operation mode is arithmetic

B1L82 = CARRY(B1_\count:counter[8] & (!B1L03));


--B1L92 is clockdiv:div|add~261
--operation mode is arithmetic

B1L92_carry_eqn = B1L23;
B1L92 = B1_\count:counter[7] $ (B1L92_carry_eqn);

--B1L03 is clockdiv:div|add~263
--operation mode is arithmetic

B1L03 = CARRY(!B1L23 # !B1_\count:counter[7]);


--B1L13 is clockdiv:div|add~266
--operation mode is arithmetic

B1L13_carry_eqn = B1L63;
B1L13 = B1_\count:counter[6] $ (!B1L13_carry_eqn);

--B1L23 is clockdiv:div|add~268
--operation mode is arithmetic

B1L23 = CARRY(B1_\count:counter[6] & (!B1L63));


--B1L33 is clockdiv:div|add~271
--operation mode is arithmetic

B1L33_carry_eqn = B1L83;
B1L33 = B1_\count:counter[4] $ (!B1L33_carry_eqn);

--B1L43 is clockdiv:div|add~273
--operation mode is arithmetic

B1L43 = CARRY(B1_\count:counter[4] & (!B1L83));


--B1L53 is clockdiv:div|add~276
--operation mode is arithmetic

B1L53_carry_eqn = B1L43;
B1L53 = B1_\count:counter[5] $ (B1L53_carry_eqn);

--B1L63 is clockdiv:div|add~278
--operation mode is arithmetic

B1L63 = CARRY(!B1L43 # !B1_\count:counter[5]);


--B1L73 is clockdiv:div|add~281
--operation mode is arithmetic

B1L73_carry_eqn = B1L04;
B1L73 = B1_\count:counter[3] $ (B1L73_carry_eqn);

--B1L83 is clockdiv:div|add~283
--operation mode is arithmetic

B1L83 = CARRY(!B1L04 # !B1_\count:counter[3]);


--B1L93 is clockdiv:div|add~286
--operation mode is arithmetic

B1L93_carry_eqn = B1L44;
B1L93 = B1_\count:counter[2] $ (!B1L93_carry_eqn);

--B1L04 is clockdiv:div|add~288
--operation mode is arithmetic

B1L04 = CARRY(B1_\count:counter[2] & (!B1L44));


--B1L14 is clockdiv:div|add~291
--operation mode is arithmetic

B1L14 = !B1_\count:counter[0];

--B1L24 is clockdiv:div|add~293
--operation mode is arithmetic

B1L24 = CARRY(B1_\count:counter[0]);


--B1L34 is clockdiv:div|add~296
--operation mode is arithmetic

B1L34_carry_eqn = B1L24;
B1L34 = B1_\count:counter[1] $ (B1L34_carry_eqn);

--B1L44 is clockdiv:div|add~298
--operation mode is arithmetic

B1L44 = CARRY(!B1L24 # !B1_\count:counter[1]);


--D1L83 is lcd:mylcd|reduce_nor~0
--operation mode is normal

D1L83 = D1L24 & (!D1_count[3]);


--C1_ql[1] is cir_shifter:mycir_shift|ql[1]
--operation mode is normal

C1_ql[1]_lut_out = lock & C1_ql[2] # !lock & (E2_qout[1]);
C1_ql[1] = DFFEAS(C1_ql[1]_lut_out, B1_clockout, VCC, , , , , , );


--E2_qout[0] is shifter:myshift_low|qout[0]
--operation mode is normal

E2_qout[0]_lut_out = reset & E2_qout[1];
E2_qout[0] = DFFEAS(E2_qout[0]_lut_out, B1_clockout, VCC, , , , , , );


--C1_qh[2] is cir_shifter:mycir_shift|qh[2]
--operation mode is normal

C1_qh[2]_lut_out = lock & C1_qh[3] # !lock & (E1_qout[2]);
C1_qh[2] = DFFEAS(C1_qh[2]_lut_out, B1_clockout, VCC, , , , , , );


--E1_qout[1] is shifter:myshift_high|qout[1]
--operation mode is normal

E1_qout[1]_lut_out = reset & E1_qout[2];
E1_qout[1] = DFFEAS(E1_qout[1]_lut_out, B1_clockout, VCC, , , , , , );


--C1_ql[2] is cir_shifter:mycir_shift|ql[2]
--operation mode is normal

C1_ql[2]_lut_out = lock & C1_ql[3] # !lock & (E2_qout[2]);
C1_ql[2] = DFFEAS(C1_ql[2]_lut_out, B1_clockout, VCC, , , , , , );


--E2_qout[1] is shifter:myshift_low|qout[1]
--operation mode is normal

E2_qout[1]_lut_out = reset & E2_qout[2];
E2_qout[1] = DFFEAS(E2_qout[1]_lut_out, B1_clockout, VCC, , , , , , );


--C1_qh[3] is cir_shifter:mycir_shift|qh[3]
--operation mode is normal

C1_qh[3]_lut_out = lock & C1_qh[4] # !lock & (E1_qout[3]);
C1_qh[3] = DFFEAS(C1_qh[3]_lut_out, B1_clockout, VCC, , , , , , );


--E1_qout[2] is shifter:myshift_high|qout[2]
--operation mode is normal

E1_qout[2]_lut_out = reset & E1_qout[3];
E1_qout[2] = DFFEAS(E1_qout[2]_lut_out, B1_clockout, VCC, , , , , , );


--C1_ql[3] is cir_shifter:mycir_shift|ql[3]
--operation mode is normal

C1_ql[3]_lut_out = lock & C1_ql[4] # !lock & (E2_qout[3]);
C1_ql[3] = DFFEAS(C1_ql[3]_lut_out, B1_clockout, VCC, , , , , , );


--E2_qout[2] is shifter:myshift_low|qout[2]
--operation mode is normal

E2_qout[2]_lut_out = reset & E2_qout[3];
E2_qout[2] = DFFEAS(E2_qout[2]_lut_out, B1_clockout, VCC, , , , , , );


--C1_qh[4] is cir_shifter:mycir_shift|qh[4]
--operation mode is normal

C1_qh[4]_lut_out = lock & C1_qh[5] # !lock & (E1_qout[4]);
C1_qh[4] = DFFEAS(C1_qh[4]_lut_out, B1_clockout, VCC, , , , , , );


--E1_qout[3] is shifter:myshift_high|qout[3]
--operation mode is normal

E1_qout[3]_lut_out = reset & E1_qout[4];
E1_qout[3] = DFFEAS(E1_qout[3]_lut_out, B1_clockout, VCC, , , , , , );


--C1_ql[4] is cir_shifter:mycir_shift|ql[4]
--operation mode is normal

C1_ql[4]_lut_out = lock & C1_ql[5] # !lock & (E2_qout[4]);
C1_ql[4] = DFFEAS(C1_ql[4]_lut_out, B1_clockout, VCC, , , , , , );


--E2_qout[3] is shifter:myshift_low|qout[3]
--operation mode is normal

E2_qout[3]_lut_out = reset & E2_qout[4];
E2_qout[3] = DFFEAS(E2_qout[3]_lut_out, B1_clockout, VCC, , , , , , );