research.fit.rpt

用vhdl语言实现2DPSK数字传输

+----------------------------------------------------------+---------+


+---------------------------------------------------+
; Interconnect Usage Summary                        ;
+----------------------------+----------------------+
; Interconnect Resource Type ; Usage                ;
+----------------------------+----------------------+
; C4s                        ; 17 / 2,870 ( < 1 % ) ;
; Direct links               ; 0 / 3,938 ( 0 % )    ;
; Global clocks              ; 2 / 4 ( 50 % )       ;
; LAB clocks                 ; 5 / 72 ( 6 % )       ;
; LUT chains                 ; 1 / 1,143 ( < 1 % )  ;
; Local interconnects        ; 15 / 3,938 ( < 1 % ) ;
; R4s                        ; 8 / 2,832 ( < 1 % )  ;
+----------------------------+----------------------+


+--------------------------------------------------------------------------+
; LAB Logic Elements                                                       ;
+--------------------------------------------+-----------------------------+
; Number of Logic Elements  (Average = 4.40) ; Number of LABs  (Total = 5) ;
+--------------------------------------------+-----------------------------+
; 1                                          ; 1                           ;
; 2                                          ; 0                           ;
; 3                                          ; 1                           ;
; 4                                          ; 1                           ;
; 5                                          ; 0                           ;
; 6                                          ; 1                           ;
; 7                                          ; 0                           ;
; 8                                          ; 1                           ;
; 9                                          ; 0                           ;
; 10                                         ; 0                           ;
+--------------------------------------------+-----------------------------+


+------------------------------------------------------------------+
; LAB-wide Signals                                                 ;
+------------------------------------+-----------------------------+
; LAB-wide Signals  (Average = 1.00) ; Number of LABs  (Total = 5) ;
+------------------------------------+-----------------------------+
; 1 Clock                            ; 5                           ;
+------------------------------------+-----------------------------+


+---------------------------------------------------------------------------+
; LAB Signals Sourced                                                       ;
+---------------------------------------------+-----------------------------+
; Number of Signals Sourced  (Average = 4.40) ; Number of LABs  (Total = 5) ;
+---------------------------------------------+-----------------------------+
; 0                                           ; 0                           ;
; 1                                           ; 1                           ;
; 2                                           ; 0                           ;
; 3                                           ; 1                           ;
; 4                                           ; 1                           ;
; 5                                           ; 0                           ;
; 6                                           ; 1                           ;
; 7                                           ; 0                           ;
; 8                                           ; 1                           ;
+---------------------------------------------+-----------------------------+


+-------------------------------------------------------------------------------+
; LAB Signals Sourced Out                                                       ;
+-------------------------------------------------+-----------------------------+
; Number of Signals Sourced Out  (Average = 3.40) ; Number of LABs  (Total = 5) ;
+-------------------------------------------------+-----------------------------+
; 0                                               ; 0                           ;
; 1                                               ; 2                           ;
; 2                                               ; 0                           ;
; 3                                               ; 1                           ;
; 4                                               ; 1                           ;
; 5                                               ; 0                           ;
; 6                                               ; 0                           ;
; 7                                               ; 0                           ;
; 8                                               ; 1                           ;
+-------------------------------------------------+-----------------------------+


+---------------------------------------------------------------------------+
; LAB Distinct Inputs                                                       ;
+---------------------------------------------+-----------------------------+
; Number of Distinct Inputs  (Average = 3.00) ; Number of LABs  (Total = 5) ;
+---------------------------------------------+-----------------------------+
; 0                                           ; 0                           ;
; 1                                           ; 0                           ;
; 2                                           ; 3                           ;
; 3                                           ; 0                           ;
; 4                                           ; 1                           ;
; 5                                           ; 1                           ;
+---------------------------------------------+-----------------------------+


+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 5.0 Build 148 04/26/2005 SJ Full Version
    Info: Processing started: Sat Oct 27 08:46:16 2007
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off research -c research
Info: Selected device EPM1270T144C5 for design "research"
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. 
    Info: Device EPM570T144C5 is compatible
    Info: Device EPM570T144I5 is compatible
    Info: Device EPM1270T144I5 is compatible
    Info: Device EPM1270T144C5ES is compatible
Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements
    Info: Assuming a global fmax requirement of 1000 MHz
    Info: Assuming a global tsu requirement of 2.0 ns
    Info: Assuming a global tco requirement of 1.0 ns
    Info: Assuming a global tpd requirement of 1.0 ns
Info: Performing register packing on registers with non-logic cell location assignments
Info: Completed register packing on registers with non-logic cell location assignments
Info: Completed User Assigned Global Signals Promotion Operation
Info: Automatically promoted signal "clk" to use Global clock in PIN 18
Info: Automatically promoted some destinations of signal "test_pass_buffer_8bit:comb_6|pass_buffer:comb_11|pass" to use Global clock
    Info: Destination "test_pass_buffer_8bit:comb_6|pass_buffer:comb_11|pass" may be non-global or may not use global clock
    Info: Destination "test_pass_buffer_8bit:comb_6|pass_buffer:comb_4|dout~12" may be non-global or may not use global clock
    Info: Destination "test_pass_buffer_8bit:comb_6|pass_buffer:comb_5|dout~12" may be non-global or may not use global clock
    Info: Destination "test_pass_buffer_8bit:comb_6|pass_buffer:comb_6|dout~12" may be non-global or may not use global clock
    Info: Destination "test_pass_buffer_8bit:comb_6|pass_buffer:comb_7|dout~12" may be non-global or may not use global clock
    Info: Destination "test_pass_buffer_8bit:comb_6|pass_buffer:comb_8|dout~12" may be non-global or may not use global clock
    Info: Destination "test_pass_buffer_8bit:comb_6|pass_buffer:comb_9|dout~12" may be non-global or may not use global clock
    Info: Destination "test_pass_buffer_8bit:comb_6|pass_buffer:comb_10|dout~12" may be non-global or may not use global clock
    Info: Destination "test_pass_buffer_8bit:comb_6|pass_buffer:comb_11|dout~12" may be non-global or may not use global clock
Info: Completed Auto Global Promotion Operation
Info: Starting register packing
Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info: Moving registers into LUTs to improve timing and density
Info: Started processing fast register assignments
Info: Finished processing fast register assignments
Info: Finished moving registers into LUTs
Info: Finished register packing
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Estimated most critical path is register to pin delay of 3.492 ns
    Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X10_Y10; Fanout = 1; REG Node = 'test_pass_buffer_8bit:comb_6|pass_buffer:comb_11|out1'
    Info: 2: + IC(0.000 ns) + CELL(0.595 ns) = 0.595 ns; Loc. = LAB_X10_Y10; Fanout = 1; COMB Node = 'test_pass_buffer_8bit:comb_6|pass_buffer:comb_11|dout~12'
    Info: 3: + IC(0.575 ns) + CELL(2.322 ns) = 3.492 ns; Loc. = PIN_122; Fanout = 0; PIN Node = 'led_out[7]'
    Info: Total cell delay = 2.917 ns ( 83.53 % )
    Info: Total interconnect delay = 0.575 ns ( 16.47 % )
Info: Fitter placement operations ending: elapsed time is 00:00:00
Info: Fitter routing operations beginning
Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 0%.
Info: Fitter routing operations ending: elapsed time is 00:00:00
Info: Fitter performed an Auto Fit compilation.  No optimizations were skipped because the design's timing and/or routability requirements required full optimization
Info: Quartus II Fitter was successful. 0 errors, 0 warnings
    Info: Processing ended: Sat Oct 27 08:46:18 2007
    Info: Elapsed time: 00:00:02