dpsk.map.eqn

用vhdl语言实现2DPSK数字传输

--operation mode is normal

C1_high[7]_lut_out = Z1_qout[7];
C1_high[7] = DFFEAS(C1_high[7]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--C1_high[14] is lcdcont:inst1|high[14]
--operation mode is normal

C1_high[14]_lut_out = Z1_qout[14];
C1_high[14] = DFFEAS(C1_high[14]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--C1_high[6] is lcdcont:inst1|high[6]
--operation mode is normal

C1_high[6]_lut_out = Z1_qout[6];
C1_high[6] = DFFEAS(C1_high[6]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--Y1L83 is lcdcont:inst1|lcd:mylcd|Mux~284
--operation mode is normal

Y1L83 = Y1_count[0] & (Y1_count[3]) # !Y1_count[0] & (Y1_count[3] & C1_high[14] # !Y1_count[3] & (C1_high[6]));


--C1_high[15] is lcdcont:inst1|high[15]
--operation mode is normal

C1_high[15]_lut_out = Z1_qout[15];
C1_high[15] = DFFEAS(C1_high[15]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--Y1L93 is lcdcont:inst1|lcd:mylcd|Mux~285
--operation mode is normal

Y1L93 = Y1_count[0] & (Y1L83 & (C1_high[15]) # !Y1L83 & C1_high[7]) # !Y1_count[0] & (Y1L83);


--Y1L04 is lcdcont:inst1|lcd:mylcd|Mux~286
--operation mode is normal

Y1L04 = Y1_count[1] & (Y1L73 & (Y1L93) # !Y1L73 & Y1L23) # !Y1_count[1] & (Y1L73);


--Y1L76 is lcdcont:inst1|lcd:mylcd|Select~760
--operation mode is normal

Y1L76 = Y1_state.write & (Y1L04 # Y1L56 & Y1L03) # !Y1_state.write & Y1L56 & Y1L03;


--Y1L14 is lcdcont:inst1|lcd:mylcd|Mux~287
--operation mode is normal

Y1L14 = Y1_count[2] # Y1_count[1] $ (!Y1_count[0] & Y1_count[3]);


--Y1L24 is lcdcont:inst1|lcd:mylcd|Mux~288
--operation mode is normal

Y1L24 = Y1_count[0] & (Y1_count[1] & !Y1_count[2] & Y1_count[3] # !Y1_count[1] & Y1_count[2] & !Y1_count[3]) # !Y1_count[0] & Y1_count[2] & (Y1_count[1] $ Y1_count[3]);


--C1_low[10] is lcdcont:inst1|low[10]
--operation mode is normal

C1_low[10]_lut_out = Z2_qout[10];
C1_low[10] = DFFEAS(C1_low[10]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--C1_low[12] is lcdcont:inst1|low[12]
--operation mode is normal

C1_low[12]_lut_out = Z2_qout[12];
C1_low[12] = DFFEAS(C1_low[12]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--C1_low[8] is lcdcont:inst1|low[8]
--operation mode is normal

C1_low[8]_lut_out = Z2_qout[8];
C1_low[8] = DFFEAS(C1_low[8]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--Y1L34 is lcdcont:inst1|lcd:mylcd|Mux~289
--operation mode is normal

Y1L34 = Y1_count[1] & (Y1_count[2]) # !Y1_count[1] & (Y1_count[2] & C1_low[12] # !Y1_count[2] & (C1_low[8]));


--C1_low[14] is lcdcont:inst1|low[14]
--operation mode is normal

C1_low[14]_lut_out = Z2_qout[14];
C1_low[14] = DFFEAS(C1_low[14]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--Y1L44 is lcdcont:inst1|lcd:mylcd|Mux~290
--operation mode is normal

Y1L44 = Y1_count[1] & (Y1L34 & (C1_low[14]) # !Y1L34 & C1_low[10]) # !Y1_count[1] & (Y1L34);


--C1_low[5] is lcdcont:inst1|low[5]
--operation mode is normal

C1_low[5]_lut_out = Z2_qout[5];
C1_low[5] = DFFEAS(C1_low[5]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--C1_low[3] is lcdcont:inst1|low[3]
--operation mode is normal

C1_low[3]_lut_out = Z2_qout[3];
C1_low[3] = DFFEAS(C1_low[3]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--C1_low[1] is lcdcont:inst1|low[1]
--operation mode is normal

C1_low[1]_lut_out = Z2_qout[1];
C1_low[1] = DFFEAS(C1_low[1]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--Y1L54 is lcdcont:inst1|lcd:mylcd|Mux~291
--operation mode is normal

Y1L54 = Y1_count[2] & (Y1_count[1]) # !Y1_count[2] & (Y1_count[1] & C1_low[3] # !Y1_count[1] & (C1_low[1]));


--C1_low[7] is lcdcont:inst1|low[7]
--operation mode is normal

C1_low[7]_lut_out = Z2_qout[7];
C1_low[7] = DFFEAS(C1_low[7]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--Y1L64 is lcdcont:inst1|lcd:mylcd|Mux~292
--operation mode is normal

Y1L64 = Y1_count[2] & (Y1L54 & (C1_low[7]) # !Y1L54 & C1_low[5]) # !Y1_count[2] & (Y1L54);


--C1_low[4] is lcdcont:inst1|low[4]
--operation mode is normal

C1_low[4]_lut_out = Z2_qout[4];
C1_low[4] = DFFEAS(C1_low[4]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--C1_low[2] is lcdcont:inst1|low[2]
--operation mode is normal

C1_low[2]_lut_out = Z2_qout[2];
C1_low[2] = DFFEAS(C1_low[2]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--C1_low[0] is lcdcont:inst1|low[0]
--operation mode is normal

C1_low[0]_lut_out = Z2_qout[0];
C1_low[0] = DFFEAS(C1_low[0]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--Y1L74 is lcdcont:inst1|lcd:mylcd|Mux~293
--operation mode is normal

Y1L74 = Y1_count[2] & (Y1_count[1]) # !Y1_count[2] & (Y1_count[1] & C1_low[2] # !Y1_count[1] & (C1_low[0]));


--C1_low[6] is lcdcont:inst1|low[6]
--operation mode is normal

C1_low[6]_lut_out = Z2_qout[6];
C1_low[6] = DFFEAS(C1_low[6]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--Y1L84 is lcdcont:inst1|lcd:mylcd|Mux~294
--operation mode is normal

Y1L84 = Y1_count[2] & (Y1L74 & (C1_low[6]) # !Y1L74 & C1_low[4]) # !Y1_count[2] & (Y1L74);


--Y1L94 is lcdcont:inst1|lcd:mylcd|Mux~295
--operation mode is normal

Y1L94 = Y1_count[3] & (Y1_count[0]) # !Y1_count[3] & (Y1_count[0] & Y1L64 # !Y1_count[0] & (Y1L84));


--C1_low[13] is lcdcont:inst1|low[13]
--operation mode is normal

C1_low[13]_lut_out = Z2_qout[13];
C1_low[13] = DFFEAS(C1_low[13]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--C1_low[11] is lcdcont:inst1|low[11]
--operation mode is normal

C1_low[11]_lut_out = Z2_qout[11];
C1_low[11] = DFFEAS(C1_low[11]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--C1_low[9] is lcdcont:inst1|low[9]
--operation mode is normal

C1_low[9]_lut_out = Z2_qout[9];
C1_low[9] = DFFEAS(C1_low[9]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--Y1L05 is lcdcont:inst1|lcd:mylcd|Mux~296
--operation mode is normal

Y1L05 = Y1_count[2] & (Y1_count[1]) # !Y1_count[2] & (Y1_count[1] & C1_low[11] # !Y1_count[1] & (C1_low[9]));


--C1_low[15] is lcdcont:inst1|low[15]
--operation mode is normal

C1_low[15]_lut_out = Z2_qout[15];
C1_low[15] = DFFEAS(C1_low[15]_lut_out, X1_clockout, VCC, , E4_state.s2, , , , );


--Y1L15 is lcdcont:inst1|lcd:mylcd|Mux~297
--operation mode is normal

Y1L15 = Y1_count[2] & (Y1L05 & (C1_low[15]) # !Y1L05 & C1_low[13]) # !Y1_count[2] & (Y1L05);


--Y1L25 is lcdcont:inst1|lcd:mylcd|Mux~298
--operation mode is normal

Y1L25 = Y1_count[3] & (Y1L94 & (Y1L15) # !Y1L94 & Y1L44) # !Y1_count[3] & (Y1L94);


--Y1L86 is lcdcont:inst1|lcd:mylcd|Select~762
--operation mode is normal

Y1L86 = Y1_state.write & (Y1L25 # Y1L56 & Y1L24) # !Y1_state.write & Y1L56 & Y1L24;


--Y1L35 is lcdcont:inst1|lcd:mylcd|Mux~299
--operation mode is normal

Y1L35 = Y1_count[2] # Y1_count[1] & (!Y1_count[3]) # !Y1_count[1] & (Y1_count[0] # Y1_count[3]);


--U1_q[4] is DPSK_shell:inst|modulate:comb_9|phase_counter:comb_10|my_syn_counter:comb_10|q[4]
--operation mode is normal

U1_q[4]_carry_eqn = U1L9;
U1_q[4]_lut_out = U1_q[4] $ (!U1_q[4]_carry_eqn);
U1_q[4] = DFFEAS(U1_q[4]_lut_out, D1L63, VCC, , , , , H1L4, );


--H1_b_int[0] is DPSK_shell:inst|modulate:comb_9|b_int[0]
--operation mode is normal

H1_b_int[0]_lut_out = H1_b_int[1];
H1_b_int[0] = DFFEAS(H1_b_int[0]_lut_out, D1L63, VCC, , , , , , );


--R1_s[4] is DPSK_shell:inst|modulate:comb_9|phase_counter:comb_10|s[4]
--operation mode is normal

R1_s[4] = U1_q[4] $ H1_b_int[0];


--U1_q[0] is DPSK_shell:inst|modulate:comb_9|phase_counter:comb_10|my_syn_counter:comb_10|q[0]
--operation mode is arithmetic

U1_q[0]_lut_out = !U1_q[0];
U1_q[0] = DFFEAS(U1_q[0]_lut_out, D1L63, VCC, , , , , H1L4, );

--U1L3 is DPSK_shell:inst|modulate:comb_9|phase_counter:comb_10|my_syn_counter:comb_10|q[0]~66
--operation mode is arithmetic

U1L3 = CARRY(U1_q[0]);


--U1_q[1] is DPSK_shell:inst|modulate:comb_9|phase_counter:comb_10|my_syn_counter:comb_10|q[1]
--operation mode is arithmetic

U1_q[1]_carry_eqn = U1L3;
U1_q[1]_lut_out = U1_q[1] $ (U1_q[1]_carry_eqn);
U1_q[1] = DFFEAS(U1_q[1]_lut_out, D1L63, VCC, , , , , H1L4, );

--U1L5 is DPSK_shell:inst|modulate:comb_9|phase_counter:comb_10|my_syn_counter:comb_10|q[1]~70
--operation mode is arithmetic

U1L5 = CARRY(!U1L3 # !U1_q[1]);


--S1L01 is DPSK_shell:inst|modulate:comb_9|phase_table:comb_11|rom_4~769
--operation mode is normal

S1L01 = !U1_q[0] & !U1_q[1];


--U1_q[2] is DPSK_shell:inst|modulate:comb_9|phase_counter:comb_10|my_syn_counter:comb_10|q[2]
--operation mode is arithmetic

U1_q[2]_carry_eqn = U1L5;
U1_q[2]_lut_out = U1_q[2] $ (!U1_q[2]_carry_eqn);
U1_q[2] = DFFEAS(U1_q[2]_lut_out, D1L63, VCC, , , , , H1L4, );

--U1L7 is DPSK_shell:inst|modulate:comb_9|phase_counter:comb_10|my_syn_counter:comb_10|q[2]~74
--operation mode is arithmetic

U1L7 = CARRY(U1_q[2] & (!U1L5));


--U1_q[3] is DPSK_shell:inst|modulate:comb_9|phase_counter:comb_10|my_syn_counter:comb_10|q[3]
--operation mode is arithmetic

U1_q[3]_carry_eqn = U1L7;
U1_q[3]_lut_out = U1_q[3] $ (U1_q[3]_carry_eqn);
U1_q[3] = DFFEAS(U1_q[3]_lut_out, D1L63, VCC, , , , , H1L4, );

--U1L9 is DPSK_shell:inst|modulate:comb_9|phase_counter:comb_10|my_syn_counter:comb_10|q[3]~78
--operation mode is arithmetic

U1L9 = CARRY(!U1L7 # !U1_q[3]);


--D1_qa[7] is DPSK_shell:inst|clk_div:comb_5|qa[7]
--operation mode is normal

D1_qa[7]_lut_out = D1L1 # D1_qa[8] & !D1L43 & !D1L53;
D1_qa[7] = DFFEAS(D1_qa[7]_lut_out, clk_50MHz, VCC, , , , , , );


--D1_qa[6] is DPSK_shell:inst|clk_div:comb_5|qa[6]
--operation mode is normal

D1_qa[6]_lut_out = D1L3;
D1_qa[6] = DFFEAS(D1_qa[6]_lut_out, clk_50MHz, VCC, , , , , , );


--D1_qa[5] is DPSK_shell:inst|clk_div:comb_5|qa[5]
--operation mode is normal

D1_qa[5]_lut_out = D1L5 # D1_qa[8] & !D1L43 & !D1L53;
D1_qa[5] = DFFEAS(D1_qa[5]_lut_out, clk_50MHz, VCC, , , , , , );


--D1_qa[4] is DPSK_shell:inst|clk_div:comb_5|qa[4]
--operation mode is normal

D1_qa[4]_lut_out = D1L7;
D1_qa[4] = DFFEAS(D1_qa[4]_lut_out, clk_50MHz, VCC, , , , , , );


--D1L43 is DPSK_shell:inst|clk_div:comb_5|reduce_nor~91
--operation mode is normal

D1L43 = !D1_qa[4] # !D1_qa[5] # !D1_qa[6] # !D1_qa[7];


--D1_qa[3] is DPSK_shell:inst|clk_div:comb_5|qa[3]
--operation mode is normal

D1_qa[3]_lut_out = D1L9 # D1_qa[8] & !D1L43 & !D1L53;
D1_qa[3] = DFFEAS(D1_qa[3]_lut_out, clk_50MHz, VCC, , , , , , );


--D1_qa[2] is DPSK_shell:inst|clk_div:comb_5|qa[2]
--operation mode is normal

D1_qa[2]_lut_out = D1L11;
D1_qa[2] = DFFEAS(D1_qa[2]_lut_out, clk_50MHz, VCC, , , , , , );


--D1_qa[1] is DPSK_shell:inst|clk_div:comb_5|qa[1]
--operation mode is normal

D1_qa[1]_lut_out = D1L31 # D1_qa[8] & !D1L43 & !D1L53;
D1_qa[1] = DFFEAS(D1_qa[1]_lut_out, clk_50MHz, VCC, , , , , , );


--D1_qa[0] is DPSK_shell:inst|clk_div:comb_5|qa[0]
--operation mode is normal

D1_qa[0]_lut_out = D1L51 # D1_qa[8] & !D1L43 & !D1L53;
D1_qa[0] = DFFEAS(D1_qa[0]_lut_out, clk_50MHz, VCC, , , , , , );


--D1L53 is DPSK_shell:inst|clk_div:comb_5|reduce_nor~92
--operation mode is normal

D1L53 = !D1_qa[0] # !D1_qa[1] # !D1_qa[2] # !D1_qa[3];


--D1_qa[8] is DPSK_shell:inst|clk_div:comb_5|qa[8]
--operation mode is normal

D1_qa[8]_lut_out = D1L71;
D1_qa[8] = DFFEAS(D1_qa[8]_lut_out, clk_50MHz, VCC, , , , , , );


--D1L63 is DPSK_shell:inst|clk_div:comb_5|reduce_nor~93
--operation mode is normal

D1L63 = !D1L43 & !D1L53 & (D1_qa[8]);


--S1L11 is DPSK_shell:inst|modulate:comb_9|phase_table:comb_11|rom_4~771
--operation mode is normal

S1L11 = U1_q[2] & (U1_q[1] & U1_q[3]) # !U1_q[2] & !U1_q[3] & (U1_q[0] $ U1_q[1]);


--S1L21 is DPSK_shell:inst|modulate:comb_9|phase_table:comb_11|rom_4~772
--operation mode is normal

S1L21 = U1_q[2] & (!U1_q[3] # !U1_q[1]) # !U1_q[2] & (U1_q[3] # U1_q[0] & U1_q[1]);


--S1L31 is DPSK_shell:inst|modulate:comb_9|phase_table:comb_11|rom_4~774
--operation mode is normal

S1L31 = U1_q[0] & (U1_q[2] $ !U1_q[3]) # !U1_q[0] & !U1_q[1] & U1_q[2];


--S1L41 is DPSK_shell:inst|modulate:comb_9|phase_table:comb_11|rom_4~775
--operation mode is normal

S1L41 = U1_q[0] & (U1_q[2] $ U1_q[3]) # !U1_q[0] & (U1_q[1] # !U1_q[2] & U1_q[3]);


--S1L51 is DPSK_shell:inst|modulate:comb_9|phase_table:comb_11|rom_4~777
--operation mode is normal

S1L51 = U1_q[1] # !U1_q[0] & U1_q[3];


--S1L61 is DPSK_shell:inst|modulate:comb_9|phase_table:comb_11|rom_4~779
--operation mode is normal

S1L61 = U1_q[0] & (U1_q[1] & !U1_q[2] & !U1_q[3] # !U1_q[1] & U1_q[2] & U1_q[3]) # !U1_q[0] & U1_q[1];


--S1L71 is DPSK_shell:inst|modulate:comb_9|phase_table:comb_11|rom_4~780
--operation mode is normal

S1L71 = U1_q[0] & (U1_q[1] & (U1_q[2] # U1_q[3]) # !U1_q[1] & (!U1_q[3] # !U1_q[2])) # !U1_q[0] & !U1_q[1] & (U1_q[2] # U1_q[3]);


--S1L81 is DPSK_shell:inst|modulate:comb_9|phase_table:comb_11|rom_4~782
--operation mode is normal