gate_control.map.eqn

verilog写的数字频率计的控制模块,对程序进行控制

--A1L91 is fref~100
A1L91_p1_out = SW1 & f10hz;
A1L91_p2_out = !SW1 & f1hz;
A1L91_or_out = A1L91_p1_out # A1L91_p2_out;
A1L91 = A1L91_or_out;


--A1L81 is fref~94
A1L81_p1_out = SW2 & f100hz;
A1L81_p2_out = !SW2 & A1L91;
A1L81_or_out = A1L81_p1_out # A1L81_p2_out;
A1L81 = A1L81_or_out;


--A1L01 is dp_s1hz$latch~10
A1L01_p1_out = !SW2 & !SW1 & A1L8;
A1L01_p2_out = A1L01 & !SW2 & !SW1 & !SW0;
A1L01_p3_out = A1L01 & !SW2 & !SW1;
A1L01_or_out = A1L01_p1_out # A1L01_p2_out # A1L01_p3_out;
A1L01 = A1L01_or_out;


--A1L21 is dp_s10hz$latch~10
A1L21_p1_out = !SW2 & SW1 & A1L8;
A1L21_p2_out = A1L21 & !SW2 & !SW1 & !SW0;
A1L21_p3_out = A1L21 & !SW2 & SW1;
A1L21_or_out = A1L21_p1_out # A1L21_p2_out # A1L21_p3_out;
A1L21 = A1L21_or_out;


--A1L41 is dp_s100hz$latch~10
A1L41_p1_out = SW2 & A1L8;
A1L41_p2_out = !SW2 & A1L41 & !SW0 & !SW1;
A1L41_p3_out = SW2 & A1L41;
A1L41_or_out = A1L41_p1_out # A1L41_p2_out # A1L41_p3_out;
A1L41 = A1L41_or_out;


--A1L02 is fref~106
A1L02_p1_out = A1L81 & A1L8;
A1L02_p2_out = A1L02 & !SW0 & !SW2 & !SW1;
A1L02_p3_out = A1L81 & A1L02;
A1L02_or_out = A1L02_p1_out # A1L02_p2_out # A1L02_p3_out;
A1L02 = A1L02_or_out;


--wire_1 is wire_1
wire_1_reg_input = VCC;
wire_1 = TFFE(wire_1_reg_input, A1L02, , , );


--wire_2 is wire_2
wire_2_or_out = !wire_1;
wire_2_reg_input = wire_2_or_out;
wire_2 = DFFE(wire_2_reg_input, !A1L02, , , );


--A1L4 is Latch_EN~11
A1L4_p1_out = !wire_1 & !wire_2;
A1L4_or_out = A1L4_p1_out;
A1L4 = A1L4_or_out;


--A1L8 is always0~10sexp
A1L8 = EXP(!SW0 & !SW2 & !SW1);


--SW0 is SW0
--operation mode is input

SW0 = INPUT();


--SW1 is SW1
--operation mode is input

SW1 = INPUT();


--SW2 is SW2
--operation mode is input

SW2 = INPUT();


--f1hz is f1hz
--operation mode is input

f1hz = INPUT();


--f10hz is f10hz
--operation mode is input

f10hz = INPUT();


--f100hz is f100hz
--operation mode is input

f100hz = INPUT();


--dp_s1hz is dp_s1hz
--operation mode is output

dp_s1hz = OUTPUT(A1L01);


--dp_s10hz is dp_s10hz
--operation mode is output

dp_s10hz = OUTPUT(A1L21);


--dp_s100hz is dp_s100hz
--operation mode is output

dp_s100hz = OUTPUT(A1L41);


--Counter_EN is Counter_EN
--operation mode is output

Counter_EN = OUTPUT(wire_1);


--Counter_Clr is Counter_Clr
--operation mode is output

Counter_Clr = OUTPUT(wire_2);


--Latch_EN is Latch_EN
--operation mode is output

Latch_EN = OUTPUT(A1L4);