gate_control.fit.eqn

verilog写的数字频率计的控制模块,对程序进行控制

--A1L32 is fref~100 at LC9
A1L32_p1_out = SW1 & f10hz;
A1L32_p2_out = !SW1 & f1hz;
A1L32_or_out = A1L32_p1_out # A1L32_p2_out;
A1L32 = A1L32_or_out;


--A1L22 is fref~94 at LC8
A1L22_p1_out = SW2 & f100hz;
A1L22_p2_out = !SW2 & A1L32;
A1L22_or_out = A1L22_p1_out # A1L22_p2_out;
A1L22 = A1L22_or_out;


--A1L41 is dp_s1hz$latch~10 at LC1
A1L41_p1_out = !SW2 & !SW1 & A1L21;
A1L41_p2_out = A1L41 & !SW2 & !SW1 & !SW0;
A1L41_p3_out = A1L41 & !SW2 & !SW1;
A1L41_or_out = A1L41_p1_out # A1L41_p2_out # A1L41_p3_out;
A1L41 = A1L41_or_out;


--A1L61 is dp_s10hz$latch~10 at LC2
A1L61_p1_out = !SW2 & SW1 & A1L21;
A1L61_p2_out = A1L61 & !SW2 & !SW1 & !SW0;
A1L61_p3_out = A1L61 & !SW2 & SW1;
A1L61_or_out = A1L61_p1_out # A1L61_p2_out # A1L61_p3_out;
A1L61 = A1L61_or_out;


--A1L81 is dp_s100hz$latch~10 at LC3
A1L81_p1_out = SW2 & A1L21;
A1L81_p2_out = !SW2 & A1L81 & !SW0 & !SW1;
A1L81_p3_out = SW2 & A1L81;
A1L81_or_out = A1L81_p1_out # A1L81_p2_out # A1L81_p3_out;
A1L81 = A1L81_or_out;


--A1L42 is fref~106 at LC4
A1L42_p1_out = A1L22 & A1L21;
A1L42_p2_out = A1L42 & !SW0 & !SW2 & !SW1;
A1L42_p3_out = A1L22 & A1L42;
A1L42_or_out = A1L42_p1_out # A1L42_p2_out # A1L42_p3_out;
A1L42 = A1L42_or_out;


--wire_1 is wire_1 at LC5
wire_1_reg_input = VCC;
wire_1 = TFFE(wire_1_reg_input, A1L42, , , );


--wire_2 is wire_2 at LC6
wire_2_or_out = !wire_1;
wire_2_reg_input = wire_2_or_out;
wire_2 = DFFE(wire_2_reg_input, !A1L42, , , );


--A1L4 is Latch_EN~11 at LC7
A1L4_p1_out = !wire_1 & !wire_2;
A1L4_or_out = A1L4_p1_out;
A1L4 = A1L4_or_out;


--A1L21 is always0~10sexp at SEXP1
A1L21 = EXP(!SW0 & !SW2 & !SW1);


--SW0 is SW0 at PIN_33
--operation mode is input

SW0 = INPUT();


--SW1 is SW1 at PIN_16
--operation mode is input

SW1 = INPUT();


--SW2 is SW2 at PIN_28
--operation mode is input

SW2 = INPUT();


--f1hz is f1hz at PIN_20
--operation mode is input

f1hz = INPUT();


--f10hz is f10hz at PIN_21
--operation mode is input

f10hz = INPUT();


--f100hz is f100hz at PIN_24
--operation mode is input

f100hz = INPUT();


--dp_s1hz is dp_s1hz at PIN_4
--operation mode is output

dp_s1hz = OUTPUT(A1L41);


--dp_s10hz is dp_s10hz at PIN_5
--operation mode is output

dp_s10hz = OUTPUT(A1L61);


--dp_s100hz is dp_s100hz at PIN_6
--operation mode is output

dp_s100hz = OUTPUT(A1L81);


--Counter_EN is Counter_EN at PIN_8
--operation mode is output

Counter_EN = OUTPUT(wire_1);


--Counter_Clr is Counter_Clr at PIN_9
--operation mode is output

Counter_Clr = OUTPUT(wire_2);


--Latch_EN is Latch_EN at PIN_11
--operation mode is output

Latch_EN = OUTPUT(A1L4);