transcript

这是基于verilog语言写的

# Reading C:/Modeltech_6.0c/tcl/vsim/pref.tcl 
# //  ModelSim SE 6.0c Feb  2 2005 
# //
# //  Copyright Mentor Graphics Corporation 2005
# //              All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND 
# //  PROPRIETARY INFORMATION WHICH IS THE PROPERTY
# //  OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
# //  AND IS SUBJECT TO LICENSE TERMS.
# //
#  OpenFile "F:/3041100072/lab2/code/DPLL_3count.v" 
# Loading project lab2
# Compile of DPLL_2KCOUNT.v was successful with warnings.
# Compile of DPLL_2KCOUNT_tp.v was successful.
# Compile of DPLL_3count.v was successful.
# Compile of DPLL_3count_tp.v was successful.
# Compile of DPLL_4count.v was successful.
# Compile of DPLL_4count_tp.v was successful.
# Compile of DPLL_H.v was successful.
# Compile of DPLL_H_tp.v was successful.
# Compile of DPLL_two.v was successful.
# Compile of DPLL_two_tp.v was successful.
# Compile of DPLL_xor.v was successful.
# Compile of DPLL_xor_tp.v was successful.
# Compile of FFD.v was successful.
# Compile of FFD_tp.v was successful.
# Compile of JK.v was successful.
# Compile of JK_tp.v was successful.
# 16 compiles, 0 failed with no errors.