fdwt_all.ssf.msg

来自「這是一個二維的上提式9/7離散小波的Verilog的源碼,此為Encoder」· MSG 代码 · 共 4 行

{  Warning "WSIM_NO_CHANNEL_FOUND" "\|FDWT_ALL\|PC_Check_1 " "Can't find signal in vector source file for input pin \|FDWT_ALL\|PC_Check_1" {  } {  }  }
{  Warning "WSIM_NO_CHANNEL_FOUND" "\|FDWT_ALL\|PC_Check_2 " "Can't find signal in vector source file for input pin \|FDWT_ALL\|PC_Check_2" {  } {  }  }
{  Info "IDBC_ERROR_COUNT" "FDWT_ALL Simulation was successful 0 s 2 s " "Design FDWT_ALL: Simulation was successful. 0 errors, 2 warnings" {  } {  }  }