coff_a.v

来自「這是一個二維的上提式9/7離散小波的Verilog的源碼,此為Encoder」· Verilog 代码 · 共 38 行

module coff_a(
	indata,
	sel,
	outdata
	);

parameter Data_Width = 20;

input	[Data_Width-1:0]	indata;
input				sel;
output	[Data_Width-1:0]	outdata;
reg	[Data_Width-1:0]	outdata;
reg	[Data_Width-2:0]	temp;

//parameter a = -1.586134342

always @(indata or sel) begin
	if(sel) begin
		temp = indata[Data_Width-2:0] + (indata[Data_Width-2:0] >> 1) +
		       (indata[Data_Width-2:0] >> 4) + (indata[Data_Width-2:0] >> 6) +
		       (indata[Data_Width-2:0] >> 7) + (indata[Data_Width-2:0] >> 13) +
		       (indata[Data_Width-2:0] >> 14) + (indata[Data_Width-2:0] >> 17) +
		       (indata[Data_Width-2:0] >> 18) + (indata[Data_Width-2:0] >> 19);
		outdata = {~indata[Data_Width-1], temp};
	end
	else begin
		temp = indata[Data_Width-2:0] + (indata[Data_Width-2:0] >> 1) +
		       (indata[Data_Width-2:0] >> 4) + (indata[Data_Width-2:0] >> 6) +
		       (indata[Data_Width-2:0] >> 7) + (indata[Data_Width-2:0] >> 13) +
		       (indata[Data_Width-2:0] >> 14) + (indata[Data_Width-2:0] >> 17) +
		       (indata[Data_Width-2:0] >> 18) + (indata[Data_Width-2:0] >> 19);
		outdata = {indata[Data_Width-1], temp};
	end
end


endmodule