coff_b.v

来自「這是一個二維的上提式9/7離散小波的Verilog的源碼,此為Encoder」· Verilog 代码 · 共 37 行

module coff_b(
	indata,
	sel,
	outdata
	);

parameter Data_Width = 20;

input	[Data_Width-1:0]	indata;
input				sel;
output	[Data_Width-1:0]	outdata;
reg	[Data_Width-1:0]	outdata;
reg	[Data_Width-2:0]	temp;

//parameter b = -0.052980118

always @(indata or sel) begin
	if(sel) begin
		temp = (indata[Data_Width-2:0] >> 5) +
		       (indata[Data_Width-2:0] >> 6) + (indata[Data_Width-2:0] >> 8) +
		       (indata[Data_Width-2:0] >> 9) + (indata[Data_Width-2:0] >> 12);
		if(indata[Data_Width-1])
			outdata = {1'b0, temp[Data_Width-2:0]};
		else
			outdata = {1'b1, temp[Data_Width-2:0]};
	end
	else begin
		temp = (indata[Data_Width-2:0] >> 5) +
		       (indata[Data_Width-2:0] >> 6) + (indata[Data_Width-2:0] >> 8) +
		       (indata[Data_Width-2:0] >> 9) + (indata[Data_Width-2:0] >> 12);
		outdata = {indata[Data_Width-1], temp[Data_Width-2:0]};
	end
end


endmodule