prev_cmp_dianzirili.qmsg

用verilog实现的电子日历程序,在Quartus II上编译通过并成功实现

{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "LD_hour\$latch " "Warning: Latch LD_hour\$latch has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[2\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[2\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 81 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "LD_min\$latch " "Warning: Latch LD_min\$latch has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[2\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[2\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 81 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "LD_mon\$latch " "Warning: Latch LD_mon\$latch has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[0\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[0\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 81 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "LD_day\$latch " "Warning: Latch LD_day\$latch has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[0\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[0\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 81 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "LD_week\$latch " "Warning: Latch LD_week\$latch has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[1\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 81 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "sec\[0\]\$latch " "Warning: Latch sec\[0\]\$latch has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[0\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[0\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "sec\[1\]_750 " "Warning: Latch sec\[1\]_750 has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[0\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[0\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "sec\[1\]\$latch " "Warning: Latch sec\[1\]\$latch has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[0\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[0\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "sec\[2\]\$latch " "Warning: Latch sec\[2\]\$latch has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[0\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[0\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "sec\[3\]\$latch " "Warning: Latch sec\[3\]\$latch has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[0\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[0\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "sec\[4\]\$latch " "Warning: Latch sec\[4\]\$latch has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[0\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[0\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "sec\[5\]\$latch " "Warning: Latch sec\[5\]\$latch has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[0\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[0\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "sec\[6\]\$latch " "Warning: Latch sec\[6\]\$latch has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[0\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[0\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "sec\[7\]\$latch " "Warning: Latch sec\[7\]\$latch has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[0\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[0\]" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 53 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0}  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 0 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "week1\[3\] data_in GND " "Warning: Reduced register \"week1\[3\]\" with stuck data_in port to stuck value GND" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 237 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "week\[3\] GND " "Warning: Pin \"week\[3\]\" stuck at GND" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0}
{ "Info" "IFTM_FTM_PRESET_POWER_UP" "" "Info: Registers with preset signals will power-up high" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 237 -1 0 } } { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 215 -1 0 } } { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 201 -1 0 } }  } 0 0 "Registers with preset signals will power-up high" 0 0 "" 0}
{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "3 3 " "Info: 3 registers lost all their fanouts during netlist optimizations. The first 3 are displayed below." { { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "wm\[2\] " "Info: Register \"wm\[2\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "wm\[1\] " "Info: Register \"wm\[1\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "wm\[0\] " "Info: Register \"wm\[0\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0}  } {  } 0 0 "%1!d! registers lost all their fanouts during netlist optimizations. The first %2!d! are displayed below." 0 0 "" 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "E:/zzs4/dianzirili.map.smsg " "Info: Generated suppressed messages file E:/zzs4/dianzirili.map.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "234 " "Info: Implemented 234 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "6 " "Info: Implemented 6 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "34 " "Info: Implemented 34 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "194 " "Info: Implemented 194 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 122 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 122 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "138 " "Info: Allocated 138 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 26 00:14:23 2007 " "Info: Processing ended: Fri Oct 26 00:14:23 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Info: Elapsed time: 00:00:05" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.1 Build 156 04/30/2007 SJ Full Version " "Info: Version 7.1 Build 156 04/30/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 26 00:14:24 2007 " "Info: Processing started: Fri Oct 26 00:14:24 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off dianzirili -c dianzirili " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off dianzirili -c dianzirili" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "IMPP_MPP_AUTO_ASSIGNED_DEVICE" "dianzirili EP2S15F484C3 " "Info: Automatically selected device EP2S15F484C3 for design dianzirili" {  } {  } 0 0 "Automatically selected device %2!s! for design %1!s!" 0 0 "" 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0}
{ "Info" "IFITCC_FITCC_QID_PARTITION_BACK_ANNOTATION_TOP" "1 0 " "Info: The Fitter has identified 1 logical partitions of which 0 have a previous placement to use" { { "Info" "IFITCC_FITCC_QID_PARTITION_BACK_ANNOTATION_NONE_OVERRIDE" "302 Top " "Info: Previous placement does not exist for 302 of 302 atoms in partition Top" {  } {  } 0 0 "Previous placement does not exist for %1!d! of %1!d! atoms in partition %2!s!" 0 0 "" 0}  } {  } 0 0 "The Fitter has identified %1!d! logical partitions of which %2!d! have a previous placement to use" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2S30F484C3 " "Info: Device EP2S30F484C3 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2S60F484C3 " "Info: Device EP2S60F484C3 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2S60F484C3ES " "Info: Device EP2S60F484C3ES is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0}
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "1 " "Info: Fitter converted 1 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~DATA0~ E13 " "Info: Pin ~DATA0~ is reserved at location E13" {  } {  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0}  } {  } 0 0 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "" 0}
{ "Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "40 40 " "Warning: No exact pin location assignment(s) for 40 pins of 40 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sec\[0\] " "Info: Pin sec\[0\] not assigned to an exact location on the device" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 -1 0 } } { "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { sec[0] } "NODE_NAME" } } { "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { sec[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sec\[1\] " "Info: Pin sec\[1\] not assigned to an exact location on the device" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 -1 0 } } { "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { sec[1] } "NODE_NAME" } } { "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { sec[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sec\[2\] " "Info: Pin sec\[2\] not assigned to an exact location on the device" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 -1 0 } } { "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { sec[2] } "NODE_NAME" } } { "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { sec[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sec\[3\] " "Info: Pin sec\[3\] not assigned to an exact location on the device" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 -1 0 } } { "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { sec[3] } "NODE_NAME" } } { "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { sec[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sec\[4\] " "Info: Pin sec\[4\] not assigned to an exact location on the device" {  } { { "dianzirili.v" "" { Text "E:/zzs4/dianzirili.v" 240 -1 0 } } { "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { sec[4] } "NODE_NAME" } } { "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { sec[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sec\[5\] " "Info: Pin sec\[5\] not assigned to an exact location o