compare3_tb.vcd

来自「PacoBlaze is a from-scratch synthesizabl」· VCD 代码 · 共 2,065 行 · 第 1/5 页

$var wire       1 &N   C $end
$var wire       1 &P   D $end
$var tri0       1 &R   GSR $end
$var reg       1 &T   Q $end
$var wire       1 &V   S $end
$upscope $end
$scope module reset_flop2 $end
$var wire       1 &O   C $end
$var wire       1 &Q   D $end
$var tri0       1 &S   GSR $end
$var reg       1 &U   Q $end
$var wire       1 &W   S $end
$upscope $end
$scope module int_capture_flop $end
$var wire       1 $s   C $end
$var wire       1 %4   D $end
$var tri0       1 %R   GSR $end
$var reg       1 %p   Q $end
$var wire       1 &1   R $end
$upscope $end
$scope module int_pulse_lut $end
$var wire       1 &X   I0 $end
$var wire       1 &y   I1 $end
$var wire       1 '=   I2 $end
$var wire       1 '^   I3 $end
$var reg       1 ("   O $end
$var reg       1 (C   tmp $end
$scope function lut4_mux4 $end
$var reg       4 (d   d [3:0] $end
$var reg       1 )(   lut4_mux4 $end
$var reg       2 )I   s [1:0] $end
$upscope $end
$upscope $end
$scope module int_flop $end
$var wire       1 $t   C $end
$var wire       1 %5   D $end
$var tri0       1 %S   GSR $end
$var reg       1 %q   Q $end
$var wire       1 &2   R $end
$upscope $end
$scope module ack_flop $end
$var wire       1 )j   C $end
$var wire       1 *%   D $end
$var tri0       1 *=   GSR $end
$var reg       1 *U   Q $end
$upscope $end
$scope module shadow_carry_flop $end
$var wire       1 *m   C $end
$var wire       1 *o   CE $end
$var wire       1 *q   D $end
$var tri0       1 *s   GSR $end
$var reg       1 *u   Q $end
$upscope $end
$scope module shadow_zero_flop $end
$var wire       1 *n   C $end
$var wire       1 *p   CE $end
$var wire       1 *r   D $end
$var tri0       1 *t   GSR $end
$var reg       1 *v   Q $end
$upscope $end
$scope module int_update_lut $end
$var wire       1 &Y   I0 $end
$var wire       1 &z   I1 $end
$var wire       1 '>   I2 $end
$var wire       1 '_   I3 $end
$var reg       1 (#   O $end
$var reg       1 (D   tmp $end
$scope function lut4_mux4 $end
$var reg       4 (e   d [3:0] $end
$var reg       1 ))   lut4_mux4 $end
$var reg       2 )J   s [1:0] $end
$upscope $end
$upscope $end
$scope module int_value_lut $end
$var wire       1 *w   I0 $end
$var wire       1 +_   I1 $end
$var wire       1 ,G   I2 $end
$var reg       1 -/   O $end
$var reg       1 -t   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .\   d [3:0] $end
$var reg       1 /D   lut3_mux4 $end
$var reg       2 0,   s [1:0] $end
$upscope $end
$upscope $end
$scope module int_enable_flop $end
$var wire       1 0q   C $end
$var wire       1 0y   CE $end
$var wire       1 1$   D $end
$var tri0       1 1,   GSR $end
$var reg       1 14   Q $end
$var wire       1 1<   R $end
$upscope $end
$scope module move_group_lut $end
$var wire       1 &Z   I0 $end
$var wire       1 &{   I1 $end
$var wire       1 '?   I2 $end
$var wire       1 '`   I3 $end
$var reg       1 ($   O $end
$var reg       1 (E   tmp $end
$scope function lut4_mux4 $end
$var reg       4 (f   d [3:0] $end
$var reg       1 )*   lut4_mux4 $end
$var reg       2 )K   s [1:0] $end
$upscope $end
$upscope $end
$scope module condition_met_lut $end
$var wire       1 &[   I0 $end
$var wire       1 &|   I1 $end
$var wire       1 '@   I2 $end
$var wire       1 'a   I3 $end
$var reg       1 (%   O $end
$var reg       1 (F   tmp $end
$scope function lut4_mux4 $end
$var reg       4 (g   d [3:0] $end
$var reg       1 )+   lut4_mux4 $end
$var reg       2 )L   s [1:0] $end
$upscope $end
$upscope $end
$scope module normal_count_lut $end
$var wire       1 *x   I0 $end
$var wire       1 +`   I1 $end
$var wire       1 ,H   I2 $end
$var reg       1 -0   O $end
$var reg       1 -u   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .]   d [3:0] $end
$var reg       1 /E   lut3_mux4 $end
$var reg       2 0-   s [1:0] $end
$upscope $end
$upscope $end
$scope module call_type_lut $end
$var wire       1 &\   I0 $end
$var wire       1 &}   I1 $end
$var wire       1 'A   I2 $end
$var wire       1 'b   I3 $end
$var reg       1 (&   O $end
$var reg       1 (G   tmp $end
$scope function lut4_mux4 $end
$var reg       4 (h   d [3:0] $end
$var reg       1 ),   lut4_mux4 $end
$var reg       2 )M   s [1:0] $end
$upscope $end
$upscope $end
$scope module push_pop_lut $end
$var wire       1 &]   I0 $end
$var wire       1 '!   I1 $end
$var wire       1 'B   I2 $end
$var wire       1 'c   I3 $end
$var reg       1 ('   O $end
$var reg       1 (H   tmp $end
$scope function lut4_mux4 $end
$var reg       4 (i   d [3:0] $end
$var reg       1 )-   lut4_mux4 $end
$var reg       2 )N   s [1:0] $end
$upscope $end
$upscope $end
$scope module valid_move_lut $end
$var wire       1 1D   I0 $end
$var wire       1 1I   I1 $end
$var reg       1 1N   O $end
$var wire       2 1S   s [1:0] $end
$upscope $end
$scope module flag_type_lut $end
$var wire       1 &^   I0 $end
$var wire       1 '"   I1 $end
$var wire       1 'C   I2 $end
$var wire       1 'd   I3 $end
$var reg       1 ((   O $end
$var reg       1 (I   tmp $end
$scope function lut4_mux4 $end
$var reg       4 (j   d [3:0] $end
$var reg       1 ).   lut4_mux4 $end
$var reg       2 )O   s [1:0] $end
$upscope $end
$upscope $end
$scope module flag_write_flop $end
$var wire       1 )k   C $end
$var wire       1 *&   D $end
$var tri0       1 *>   GSR $end
$var reg       1 *V   Q $end
$upscope $end
$scope module flag_enable_lut $end
$var wire       1 1E   I0 $end
$var wire       1 1J   I1 $end
$var reg       1 1O   O $end
$var wire       2 1T   s [1:0] $end
$upscope $end
$scope module low_zero_lut $end
$var wire       1 &_   I0 $end
$var wire       1 '#   I1 $end
$var wire       1 'D   I2 $end
$var wire       1 'e   I3 $end
$var reg       1 ()   O $end
$var reg       1 (J   tmp $end
$scope function lut4_mux4 $end
$var reg       4 (k   d [3:0] $end
$var reg       1 )/   lut4_mux4 $end
$var reg       2 )P   s [1:0] $end
$upscope $end
$upscope $end
$scope module high_zero_lut $end
$var wire       1 &`   I0 $end
$var wire       1 '$   I1 $end
$var wire       1 'E   I2 $end
$var wire       1 'f   I3 $end
$var reg       1 (*   O $end
$var reg       1 (K   tmp $end
$scope function lut4_mux4 $end
$var reg       4 (l   d [3:0] $end
$var reg       1 )0   lut4_mux4 $end
$var reg       2 )Q   s [1:0] $end
$upscope $end
$upscope $end
$scope module low_zero_muxcy $end
$var wire       1 1X   CI $end
$var wire       1 2"   DI $end
$var reg       1 2I   O $end
$var wire       1 2p   S $end
$upscope $end
$scope module high_zero_cymux $end
$var wire       1 1Y   CI $end
$var wire       1 2#   DI $end
$var reg       1 2J   O $end
$var wire       1 2q   S $end
$upscope $end
$scope module sel_shadow_zero_lut $end
$var wire       1 *y   I0 $end
$var wire       1 +a   I1 $end
$var wire       1 ,I   I2 $end
$var reg       1 -1   O $end
$var reg       1 -v   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .^   d [3:0] $end
$var reg       1 /F   lut3_mux4 $end
$var reg       2 0.   s [1:0] $end
$upscope $end
$upscope $end
$scope module zero_cymux $end
$var wire       1 1Z   CI $end
$var wire       1 2$   DI $end
$var reg       1 2K   O $end
$var wire       1 2r   S $end
$upscope $end
$scope module zero_xor $end
$var wire       1 3:   CI $end
$var wire       1 3_   LI $end
$var wire       1 4'   O $end
$upscope $end
$scope module zero_flag_flop $end
$var wire       1 0r   C $end
$var wire       1 0z   CE $end
$var wire       1 1%   D $end
$var tri0       1 1-   GSR $end
$var reg       1 15   Q $end
$var wire       1 1=   R $end
$upscope $end
$scope module low_parity_lut $end
$var wire       1 &a   I0 $end
$var wire       1 '%   I1 $end
$var wire       1 'F   I2 $end
$var wire       1 'g   I3 $end
$var reg       1 (+   O $end
$var reg       1 (L   tmp $end
$scope function lut4_mux4 $end
$var reg       4 (m   d [3:0] $end
$var reg       1 )1   lut4_mux4 $end
$var reg       2 )R   s [1:0] $end
$upscope $end
$upscope $end
$scope module high_parity_lut $end
$var wire       1 &b   I0 $end
$var wire       1 '&   I1 $end
$var wire       1 'G   I2 $end
$var wire       1 'h   I3 $end
$var reg       1 (,   O $end
$var reg       1 (M   tmp $end
$scope function lut4_mux4 $end
$var reg       4 (n   d [3:0] $end
$var reg       1 )2   lut4_mux4 $end
$var reg       2 )S   s [1:0] $end
$upscope $end
$upscope $end
$scope module parity_muxcy $end
$var wire       1 1[   CI $end
$var wire       1 2%   DI $end
$var reg       1 2L   O $end
$var wire       1 2s   S $end
$upscope $end
$scope module parity_xor $end
$var wire       1 3;   CI $end
$var wire       1 3`   LI $end
$var wire       1 4(   O $end
$upscope $end
$scope module sel_parity_lut $end
$var wire       1 &c   I0 $end
$var wire       1 ''   I1 $end
$var wire       1 'H   I2 $end
$var wire       1 'i   I3 $end
$var reg       1 (-   O $end
$var reg       1 (N   tmp $end
$scope function lut4_mux4 $end
$var reg       4 (o   d [3:0] $end
$var reg       1 )3   lut4_mux4 $end
$var reg       2 )T   s [1:0] $end
$upscope $end
$upscope $end
$scope module sel_arith_carry_lut $end
$var wire       1 *z   I0 $end
$var wire       1 +b   I1 $end
$var wire       1 ,J   I2 $end
$var reg       1 -2   O $end
$var reg       1 -w   tmp $end
$scope function lut3_mux4 $end
$var reg       4 ._   d [3:0] $end
$var reg       1 /G   lut3_mux4 $end
$var reg       2 0/   s [1:0] $end
$upscope $end
$upscope $end
$scope module sel_shift_carry_lut $end
$var wire       1 1F   I0 $end
$var wire       1 1K   I1 $end
$var reg       1 1P   O $end
$var wire       2 1U   s [1:0] $end
$upscope $end
$scope module sel_shadow_carry_lut $end
$var wire       1 1G   I0 $end
$var wire       1 1L   I1 $end
$var reg       1 1Q   O $end
$var wire       2 1V   s [1:0] $end
$upscope $end
$scope module sel_shadow_muxcy $end
$var wire       1 1\   CI $end
$var wire       1 2&   DI $end
$var reg       1 2M   O $end
$var wire       1 2t   S $end
$upscope $end
$scope module sel_shift_muxcy $end
$var wire       1 1]   CI $end
$var wire       1 2'   DI $end
$var reg       1 2N   O $end
$var wire       1 2u   S $end
$upscope $end
$scope module sel_arith_muxcy $end
$var wire       1 1^   CI $end
$var wire       1 2(   DI $end
$var reg       1 2O   O $end
$var wire       1 2v   S $end
$upscope $end
$scope module sel_parity_muxcy $end
$var wire       1 1_   CI $end
$var wire       1 2)   DI $end
$var reg       1 2P   O $end
$var wire       1 2w   S $end
$upscope $end
$scope module carry_xor $end
$var wire       1 3<   CI $end
$var wire       1 3a   LI $end
$var wire       1 4)   O $end
$upscope $end
$scope module carry_flag_flop $end
$var wire       1 0s   C $end
$var wire       1 0{   CE $end
$var wire       1 1&   D $end
$var tri0       1 1.   GSR $end
$var reg       1 16   Q $end
$var wire       1 1>   R $end
$upscope $end
$scope module invert_enable $end
$var wire       1 4L   I $end
$var wire       1 4P   O $end
$upscope $end
$scope module vector_select_mux_0 $end
$var wire       1 *{   I0 $end
$var wire       1 +c   I1 $end
$var wire       1 ,K   I2 $end
$var reg       1 -3   O $end
$var reg       1 -x   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .`   d [3:0] $end
$var reg       1 /H   lut3_mux4 $end
$var reg       2 00   s [1:0] $end
$upscope $end
$upscope $end
$scope module value_select_mux_0 $end
$var wire       1 *|   I0 $end
$var wire       1 +d   I1 $end
$var wire       1 ,L   I2 $end
$var reg       1 -4   O $end
$var reg       1 -y   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .a   d [3:0] $end
$var reg       1 /I   lut3_mux4 $end
$var reg       2 01   s [1:0] $end
$upscope $end
$upscope $end
$scope module pc_loop_register_bit_0 $end
$var wire       1 4T   C $end
$var wire       1 4^   CE $end
$var wire       1 4h   D $end
$var tri0       1 4r   GSR $end
$var reg       1 4|   Q $end
$var wire       1 5)   R $end
$var wire       1 53   S $end
$upscope $end
$scope module pc_vector_muxcy_0 $end
$var wire       1 1`   CI $end
$var wire       1 2*   DI $end
$var reg       1 2Q   O $end
$var wire       1 2x   S $end
$upscope $end
$scope module pc_vector_xor_0 $end
$var wire       1 3=   CI $end