compare3_tb.vcd

来自「PacoBlaze is a from-scratch synthesizabl」· VCD 代码 · 共 2,065 行 · 第 1/5 页

$var wire       1 3b   LI $end
$var wire       1 4*   O $end
$upscope $end
$scope module pc_value_muxcy_0 $end
$var wire       1 1a   CI $end
$var wire       1 2+   DI $end
$var reg       1 2R   O $end
$var wire       1 2y   S $end
$upscope $end
$scope module pc_value_xor_0 $end
$var wire       1 3>   CI $end
$var wire       1 3c   LI $end
$var wire       1 4+   O $end
$upscope $end
$scope module vector_select_mux_1 $end
$var wire       1 *}   I0 $end
$var wire       1 +e   I1 $end
$var wire       1 ,M   I2 $end
$var reg       1 -5   O $end
$var reg       1 -z   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .b   d [3:0] $end
$var reg       1 /J   lut3_mux4 $end
$var reg       2 02   s [1:0] $end
$upscope $end
$upscope $end
$scope module value_select_mux_1 $end
$var wire       1 +!   I0 $end
$var wire       1 +f   I1 $end
$var wire       1 ,N   I2 $end
$var reg       1 -6   O $end
$var reg       1 -{   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .c   d [3:0] $end
$var reg       1 /K   lut3_mux4 $end
$var reg       2 03   s [1:0] $end
$upscope $end
$upscope $end
$scope module pc_loop_register_bit_1 $end
$var wire       1 4U   C $end
$var wire       1 4_   CE $end
$var wire       1 4i   D $end
$var tri0       1 4s   GSR $end
$var reg       1 4}   Q $end
$var wire       1 5*   R $end
$var wire       1 54   S $end
$upscope $end
$scope module pc_vector_muxcy_1 $end
$var wire       1 1b   CI $end
$var wire       1 2,   DI $end
$var reg       1 2S   O $end
$var wire       1 2z   S $end
$upscope $end
$scope module pc_vector_xor_1 $end
$var wire       1 3?   CI $end
$var wire       1 3d   LI $end
$var wire       1 4,   O $end
$upscope $end
$scope module pc_value_muxcy_1 $end
$var wire       1 1c   CI $end
$var wire       1 2-   DI $end
$var reg       1 2T   O $end
$var wire       1 2{   S $end
$upscope $end
$scope module pc_value_xor_1 $end
$var wire       1 3@   CI $end
$var wire       1 3e   LI $end
$var wire       1 4-   O $end
$upscope $end
$scope module vector_select_mux_2 $end
$var wire       1 +"   I0 $end
$var wire       1 +g   I1 $end
$var wire       1 ,O   I2 $end
$var reg       1 -7   O $end
$var reg       1 -|   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .d   d [3:0] $end
$var reg       1 /L   lut3_mux4 $end
$var reg       2 04   s [1:0] $end
$upscope $end
$upscope $end
$scope module value_select_mux_2 $end
$var wire       1 +#   I0 $end
$var wire       1 +h   I1 $end
$var wire       1 ,P   I2 $end
$var reg       1 -8   O $end
$var reg       1 -}   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .e   d [3:0] $end
$var reg       1 /M   lut3_mux4 $end
$var reg       2 05   s [1:0] $end
$upscope $end
$upscope $end
$scope module pc_loop_register_bit_2 $end
$var wire       1 4V   C $end
$var wire       1 4`   CE $end
$var wire       1 4j   D $end
$var tri0       1 4t   GSR $end
$var reg       1 5!   Q $end
$var wire       1 5+   R $end
$var wire       1 55   S $end
$upscope $end
$scope module pc_vector_muxcy_2 $end
$var wire       1 1d   CI $end
$var wire       1 2.   DI $end
$var reg       1 2U   O $end
$var wire       1 2|   S $end
$upscope $end
$scope module pc_vector_xor_2 $end
$var wire       1 3A   CI $end
$var wire       1 3f   LI $end
$var wire       1 4.   O $end
$upscope $end
$scope module pc_value_muxcy_2 $end
$var wire       1 1e   CI $end
$var wire       1 2/   DI $end
$var reg       1 2V   O $end
$var wire       1 2}   S $end
$upscope $end
$scope module pc_value_xor_2 $end
$var wire       1 3B   CI $end
$var wire       1 3g   LI $end
$var wire       1 4/   O $end
$upscope $end
$scope module vector_select_mux_3 $end
$var wire       1 +$   I0 $end
$var wire       1 +i   I1 $end
$var wire       1 ,Q   I2 $end
$var reg       1 -9   O $end
$var reg       1 .!   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .f   d [3:0] $end
$var reg       1 /N   lut3_mux4 $end
$var reg       2 06   s [1:0] $end
$upscope $end
$upscope $end
$scope module value_select_mux_3 $end
$var wire       1 +%   I0 $end
$var wire       1 +j   I1 $end
$var wire       1 ,R   I2 $end
$var reg       1 -:   O $end
$var reg       1 ."   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .g   d [3:0] $end
$var reg       1 /O   lut3_mux4 $end
$var reg       2 07   s [1:0] $end
$upscope $end
$upscope $end
$scope module pc_loop_register_bit_3 $end
$var wire       1 4W   C $end
$var wire       1 4a   CE $end
$var wire       1 4k   D $end
$var tri0       1 4u   GSR $end
$var reg       1 5"   Q $end
$var wire       1 5,   R $end
$var wire       1 56   S $end
$upscope $end
$scope module pc_vector_muxcy_3 $end
$var wire       1 1f   CI $end
$var wire       1 20   DI $end
$var reg       1 2W   O $end
$var wire       1 3!   S $end
$upscope $end
$scope module pc_vector_xor_3 $end
$var wire       1 3C   CI $end
$var wire       1 3h   LI $end
$var wire       1 40   O $end
$upscope $end
$scope module pc_value_muxcy_3 $end
$var wire       1 1g   CI $end
$var wire       1 21   DI $end
$var reg       1 2X   O $end
$var wire       1 3"   S $end
$upscope $end
$scope module pc_value_xor_3 $end
$var wire       1 3D   CI $end
$var wire       1 3i   LI $end
$var wire       1 41   O $end
$upscope $end
$scope module vector_select_mux_4 $end
$var wire       1 +&   I0 $end
$var wire       1 +k   I1 $end
$var wire       1 ,S   I2 $end
$var reg       1 -;   O $end
$var reg       1 .#   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .h   d [3:0] $end
$var reg       1 /P   lut3_mux4 $end
$var reg       2 08   s [1:0] $end
$upscope $end
$upscope $end
$scope module value_select_mux_4 $end
$var wire       1 +'   I0 $end
$var wire       1 +l   I1 $end
$var wire       1 ,T   I2 $end
$var reg       1 -<   O $end
$var reg       1 .$   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .i   d [3:0] $end
$var reg       1 /Q   lut3_mux4 $end
$var reg       2 09   s [1:0] $end
$upscope $end
$upscope $end
$scope module pc_loop_register_bit_4 $end
$var wire       1 4X   C $end
$var wire       1 4b   CE $end
$var wire       1 4l   D $end
$var tri0       1 4v   GSR $end
$var reg       1 5#   Q $end
$var wire       1 5-   R $end
$var wire       1 57   S $end
$upscope $end
$scope module pc_vector_muxcy_4 $end
$var wire       1 1h   CI $end
$var wire       1 22   DI $end
$var reg       1 2Y   O $end
$var wire       1 3#   S $end
$upscope $end
$scope module pc_vector_xor_4 $end
$var wire       1 3E   CI $end
$var wire       1 3j   LI $end
$var wire       1 42   O $end
$upscope $end
$scope module pc_value_muxcy_4 $end
$var wire       1 1i   CI $end
$var wire       1 23   DI $end
$var reg       1 2Z   O $end
$var wire       1 3$   S $end
$upscope $end
$scope module pc_value_xor_4 $end
$var wire       1 3F   CI $end
$var wire       1 3k   LI $end
$var wire       1 43   O $end
$upscope $end
$scope module vector_select_mux_5 $end
$var wire       1 +(   I0 $end
$var wire       1 +m   I1 $end
$var wire       1 ,U   I2 $end
$var reg       1 -=   O $end
$var reg       1 .%   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .j   d [3:0] $end
$var reg       1 /R   lut3_mux4 $end
$var reg       2 0:   s [1:0] $end
$upscope $end
$upscope $end
$scope module value_select_mux_5 $end
$var wire       1 +)   I0 $end
$var wire       1 +n   I1 $end
$var wire       1 ,V   I2 $end
$var reg       1 ->   O $end
$var reg       1 .&   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .k   d [3:0] $end
$var reg       1 /S   lut3_mux4 $end
$var reg       2 0;   s [1:0] $end
$upscope $end
$upscope $end
$scope module pc_loop_register_bit_5 $end
$var wire       1 4Y   C $end
$var wire       1 4c   CE $end
$var wire       1 4m   D $end
$var tri0       1 4w   GSR $end
$var reg       1 5$   Q $end
$var wire       1 5.   R $end
$var wire       1 58   S $end
$upscope $end
$scope module pc_vector_muxcy_5 $end
$var wire       1 1j   CI $end
$var wire       1 24   DI $end
$var reg       1 2[   O $end
$var wire       1 3%   S $end
$upscope $end
$scope module pc_vector_xor_5 $end
$var wire       1 3G   CI $end
$var wire       1 3l   LI $end
$var wire       1 44   O $end
$upscope $end
$scope module pc_value_muxcy_5 $end
$var wire       1 1k   CI $end
$var wire       1 25   DI $end
$var reg       1 2\   O $end
$var wire       1 3&   S $end
$upscope $end
$scope module pc_value_xor_5 $end
$var wire       1 3H   CI $end
$var wire       1 3m   LI $end
$var wire       1 45   O $end
$upscope $end
$scope module vector_select_mux_6 $end
$var wire       1 +*   I0 $end
$var wire       1 +o   I1 $end
$var wire       1 ,W   I2 $end
$var reg       1 -?   O $end
$var reg       1 .'   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .l   d [3:0] $end
$var reg       1 /T   lut3_mux4 $end
$var reg       2 0<   s [1:0] $end
$upscope $end
$upscope $end
$scope module value_select_mux_6 $end
$var wire       1 ++   I0 $end
$var wire       1 +p   I1 $end
$var wire       1 ,X   I2 $end
$var reg       1 -@   O $end
$var reg       1 .(   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .m   d [3:0] $end
$var reg       1 /U   lut3_mux4 $end
$var reg       2 0=   s [1:0] $end
$upscope $end
$upscope $end
$scope module pc_loop_register_bit_6 $end
$var wire       1 4Z   C $end
$var wire       1 4d   CE $end
$var wire       1 4n   D $end
$var tri0       1 4x   GSR $end
$var reg       1 5%   Q $end
$var wire       1 5/   R $end
$var wire       1 59   S $end
$upscope $end
$scope module pc_vector_muxcy_6 $end
$var wire       1 1l   CI $end
$var wire       1 26   DI $end
$var reg       1 2]   O $end
$var wire       1 3'   S $end
$upscope $end
$scope module pc_vector_xor_6 $end
$var wire       1 3I   CI $end
$var wire       1 3n   LI $end
$var wire       1 46   O $end
$upscope $end
$scope module pc_value_muxcy_6 $end
$var wire       1 1m   CI $end
$var wire       1 27   DI $end
$var reg       1 2^   O $end
$var wire       1 3(   S $end
$upscope $end
$scope module pc_value_xor_6 $end
$var wire       1 3J   CI $end
$var wire       1 3o   LI $end
$var wire       1 47   O $end
$upscope $end
$scope module vector_select_mux_7 $end
$var wire       1 +,   I0 $end
$var wire       1 +q   I1 $end
$var wire       1 ,Y   I2 $end
$var reg       1 -A   O $end
$var reg       1 .)   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .n   d [3:0] $end
$var reg       1 /V   lut3_mux4 $end
$var reg       2 0>   s [1:0] $end
$upscope $end
$upscope $end
$scope module value_select_mux_7 $end
$var wire       1 +-   I0 $end
$var wire       1 +r   I1 $end
$var wire       1 ,Z   I2 $end
$var reg       1 -B   O $end
$var reg       1 .*   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .o   d [3:0] $end
$var reg       1 /W   lut3_mux4 $end
$var reg       2 0?   s [1:0] $end
$upscope $end
$upscope $end
$scope module pc_loop_register_bit_7 $end
$var wire       1 4[   C $end
$var wire       1 4e   CE $end
$var wire       1 4o   D $end
$var tri0       1 4y   GSR $end
$var reg       1 5&   Q $end
$var wire       1 50   R $end
$var wire       1 5:   S $end
$upscope $end
$scope module pc_vector_muxcy_7 $end
$var wire       1 1n   CI $end
$var wire       1 28   DI $end
$var reg       1 2_   O $end
$var wire       1 3)   S $end
$upscope $end
$scope module pc_vector_xor_7 $end
$var wire       1 3K   CI $end
$var wire       1 3p   LI $end
$var wire       1 48   O $end
$upscope $end
$scope module pc_value_muxcy_7 $end
$var wire       1 1o   CI $end
$var wire       1 29   DI $end
$var reg       1 2`   O $end
$var wire       1 3*   S $end
$upscope $end
$scope module pc_value_xor_7 $end
$var wire       1 3L   CI $end
$var wire       1 3q   LI $end
$var wire       1 49   O $end
$upscope $end
$scope module vector_select_mux_8 $end
$var wire       1 +.   I0 $end
$var wire       1 +s   I1 $end
$var wire       1 ,[   I2 $end
$var reg       1 -C   O $end
$var reg       1 .+   tmp $end
$scope function lut3_mux4 $end
$var reg       4 .p   d [3:0] $end
$var reg       1 /X   lut3_mux4 $end
$var reg       2 0@   s [1:0] $end
$upscope $end
$upscope $end
$scope module value_select_mux_8 $end
$var wire       1 +/   I0 $end